This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the tran...This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the transformations of the original task graphs,which include dependent tasks located in different iterations,as inputs.The proposed method utilizes mapping selection as well as joint processor and communication frequency scaling to implement energy reduction.We conduct experiments on several random task graphs.Experimental results show that the proposed method can achieve substantial energy reduction compared with previous work under the same hard timing constraints.展开更多
文摘This paper presents a method to reduce the energy consumption of multi-core systems characterized by processor cores and buses with discrete frequency levels under timing constraints.The proposed method takes the transformations of the original task graphs,which include dependent tasks located in different iterations,as inputs.The proposed method utilizes mapping selection as well as joint processor and communication frequency scaling to implement energy reduction.We conduct experiments on several random task graphs.Experimental results show that the proposed method can achieve substantial energy reduction compared with previous work under the same hard timing constraints.
