The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore ...The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.展开更多
Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. ...Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. Methods to lower IOP remain the first line treatments for the condition. Current methods of IOP measurement do not permit temporary noninvasive monitoring 24-hour IOP on a periodic basis. Ongoing research will in time provide a means of developing a device that will enable continuous or temporary monitoring of IOP. At present a device suitable for clinical use is not yet available.This review contains a description of different devices currently in development for measuring IOP: soft contact lens, LC resonant circuits and on-chip sensing devices. All of them use application-specific integrated circuits (ASICS) to process the measured signals and send them to recording devices. Soft contact lens devices are based on an embedded strain gauge, LC circuits vary their resonance frequency depending on the intraocular pressure (IOP) and, finally, on-chip sensing devices include an integrated microelectromechanical sensor (MEMS). MEMS are capacitors whose capacity varies with IOP. These devices allow for an accurate IOP measurement (up to +/– 0.2 mm Hg) with high sampling rates (up to 1 sample/min) and storing 1 week of raw data. All of them operate in an autonomous way and even some of them are energetically independent.展开更多
随着工业技术的进步,高温高动态压力传感器的应用需求显著增加。提出一种集成专用补偿电路的高动态硅压阻式微电子机械系统(Micro-Electro-Mechanical Systems,MEMS)压力传感器,进行压力敏感芯片的结构设计和加工工艺设计,并对压力传感...随着工业技术的进步,高温高动态压力传感器的应用需求显著增加。提出一种集成专用补偿电路的高动态硅压阻式微电子机械系统(Micro-Electro-Mechanical Systems,MEMS)压力传感器,进行压力敏感芯片的结构设计和加工工艺设计,并对压力传感器进行封装和温度补偿电路设计。多层绝缘体上硅(Silicon On Insulator,SOI)材料能够使传感器在高温环境下正常工作。无引线的封装方式可有效提升传感器的频响性能。传感器后端集成了桥阻式专用集成电路(Application Specific Integrated Circuits,ASIC),能够显著减小传感器的体积,同时提升传感器整体性能。该MEMS传感器通过自动压力测试系统进行性能试验,结果表明MEMS压力传感器经过补偿后能够实现较高的线性度、稳定的零点输出特性以及理想的动态输出特性。展开更多
为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来...为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来,研究能实现RS编码功能的芯片。在系统架构层,针对RS编码算法中伽罗华域的乘法运算在硬件实现时存在数据运算量大、消耗功耗大等问题,提出基于乘法器因子矩阵的方法对RS编码算法进行优化,通过将乘法运算转化为减法运算等方式减少数据运算量,从而降低功耗。在RTL级和门级层面,分别在逻辑综合和后端实现中加以约束来实现低功耗设计,总体功耗可以降低60%左右。解决了因IC芯片功耗过高导致芯片性能下降,从而影响芯片正常工作等问题,为集成电路工艺提供了新的发展方向。展开更多
为了提高水轮机调速器的可靠性,对全数字式水轮机调速器进行了研究,它以可编程控制器(PLC)为基础,结合专用集成电路技术(application specific integrated circuit,ASIC)进行测频和位移测量,同时采用一个全数字式的液压控制系统——数...为了提高水轮机调速器的可靠性,对全数字式水轮机调速器进行了研究,它以可编程控制器(PLC)为基础,结合专用集成电路技术(application specific integrated circuit,ASIC)进行测频和位移测量,同时采用一个全数字式的液压控制系统——数字阀插装阀并联液压控制系统,从而构成一个真正的全数字式水轮机调速器,即从信号的采集到控制的输出全部实现了数字化.在水轮机调速器半物理仿真实验台上进行了实验.结果表明,它的控制性能良好,可以满足水轮机对调速器的要求.展开更多
The SubBytes (S-box) transformation is the most crucial operation in the AES algorithm, significantly impacting the implementation performance of AES chips. To design a high-performance S-box, a segmented optimization...The SubBytes (S-box) transformation is the most crucial operation in the AES algorithm, significantly impacting the implementation performance of AES chips. To design a high-performance S-box, a segmented optimization implementation of the S-box is proposed based on the composite field inverse operation in this paper. This proposed S-box implementation is modeled using Verilog language and synthesized using Design Complier software under the premise of ensuring the correctness of the simulation result. The synthesis results show that, compared to several current S-box implementation schemes, the proposed implementation of the S-box significantly reduces the area overhead and critical path delay, then gets higher hardware efficiency. This provides strong support for realizing efficient and compact S-box ASIC designs.展开更多
基金supported by the Knowledge Innovation Program of the Chinese Academy of Sciences(KJCX2-YW-N27)the CAS Center for Excellence in Particle Physics(CCEPP)
文摘The water Cherenkov detector array(WCDA) is an important part of the large high-altitude air shower observatory(LHAASO),which is in a research and development phase.The central scientific goal of LHAASO is to explore the origin of high-energy cosmic rays of the universe and to push forward the frontier of new physics.To simplify the WCDA's readout electronics,a prototype of a front-end readout for an application-specific integrated circuit(ASIC) is designed based on the timeover-threshold method to achieve charge-to-time conversion.High-precision time measurement and charge measurement are necessary over a full dynamic range[1-4000photoelectrons(P.E.)].To evaluate the performance of this ASIC,a test system is designed that includes the front-end ASIC test module,digitization module,and test software.The first module needs to be customized for different ASIC versions,whereas the digitization module and test software are tested for general-purpose use.In the digitization module,a field programmable gate array-based time-todigital converter is designed with a bin size of 333 ps,which also integrates an inter-integrated circuit to configure the ASIC test module,and a universal serial bus interface is designed to transfer data to the remote computer.Test results indicate that the time resolution is better than 0.5 ns,and the charge resolution is better than 30%root mean square(RMS) at 1 P.E.and 3%RMS at 4000 P.E.,which are beyond the application requirements.
文摘Glaucoma is a neurodegenerative condition that is the leading cause of irreversible blindness worldwide. Elevated intraocular pressure (IOP) is the main risk factor for the development and progression of the disease. Methods to lower IOP remain the first line treatments for the condition. Current methods of IOP measurement do not permit temporary noninvasive monitoring 24-hour IOP on a periodic basis. Ongoing research will in time provide a means of developing a device that will enable continuous or temporary monitoring of IOP. At present a device suitable for clinical use is not yet available.This review contains a description of different devices currently in development for measuring IOP: soft contact lens, LC resonant circuits and on-chip sensing devices. All of them use application-specific integrated circuits (ASICS) to process the measured signals and send them to recording devices. Soft contact lens devices are based on an embedded strain gauge, LC circuits vary their resonance frequency depending on the intraocular pressure (IOP) and, finally, on-chip sensing devices include an integrated microelectromechanical sensor (MEMS). MEMS are capacitors whose capacity varies with IOP. These devices allow for an accurate IOP measurement (up to +/– 0.2 mm Hg) with high sampling rates (up to 1 sample/min) and storing 1 week of raw data. All of them operate in an autonomous way and even some of them are energetically independent.
文摘随着工业技术的进步,高温高动态压力传感器的应用需求显著增加。提出一种集成专用补偿电路的高动态硅压阻式微电子机械系统(Micro-Electro-Mechanical Systems,MEMS)压力传感器,进行压力敏感芯片的结构设计和加工工艺设计,并对压力传感器进行封装和温度补偿电路设计。多层绝缘体上硅(Silicon On Insulator,SOI)材料能够使传感器在高温环境下正常工作。无引线的封装方式可有效提升传感器的频响性能。传感器后端集成了桥阻式专用集成电路(Application Specific Integrated Circuits,ASIC),能够显著减小传感器的体积,同时提升传感器整体性能。该MEMS传感器通过自动压力测试系统进行性能试验,结果表明MEMS压力传感器经过补偿后能够实现较高的线性度、稳定的零点输出特性以及理想的动态输出特性。
文摘为解决里所(Reed-solomon,RS)编码的低功耗设计,从系统架构、RTL级、门级等不同设计层级进行分析,并在专用集成电路(Application specific integrated circuit,ASIC)设计中加以实践。基于低功耗设计将前端RTL级设计与后端IC设计结合起来,研究能实现RS编码功能的芯片。在系统架构层,针对RS编码算法中伽罗华域的乘法运算在硬件实现时存在数据运算量大、消耗功耗大等问题,提出基于乘法器因子矩阵的方法对RS编码算法进行优化,通过将乘法运算转化为减法运算等方式减少数据运算量,从而降低功耗。在RTL级和门级层面,分别在逻辑综合和后端实现中加以约束来实现低功耗设计,总体功耗可以降低60%左右。解决了因IC芯片功耗过高导致芯片性能下降,从而影响芯片正常工作等问题,为集成电路工艺提供了新的发展方向。
文摘为了提高水轮机调速器的可靠性,对全数字式水轮机调速器进行了研究,它以可编程控制器(PLC)为基础,结合专用集成电路技术(application specific integrated circuit,ASIC)进行测频和位移测量,同时采用一个全数字式的液压控制系统——数字阀插装阀并联液压控制系统,从而构成一个真正的全数字式水轮机调速器,即从信号的采集到控制的输出全部实现了数字化.在水轮机调速器半物理仿真实验台上进行了实验.结果表明,它的控制性能良好,可以满足水轮机对调速器的要求.
文摘The SubBytes (S-box) transformation is the most crucial operation in the AES algorithm, significantly impacting the implementation performance of AES chips. To design a high-performance S-box, a segmented optimization implementation of the S-box is proposed based on the composite field inverse operation in this paper. This proposed S-box implementation is modeled using Verilog language and synthesized using Design Complier software under the premise of ensuring the correctness of the simulation result. The synthesis results show that, compared to several current S-box implementation schemes, the proposed implementation of the S-box significantly reduces the area overhead and critical path delay, then gets higher hardware efficiency. This provides strong support for realizing efficient and compact S-box ASIC designs.
