Service-oriented air combat simulation architecture

Service-oriented air combat simulation architecture is proposed.The core design goal is high agility which represents the ability to accommodate the simulation requirements change.Its main idea is to design model units as services that can communicate and interoperate with any other services at runtime.A service is autonomous and is fully defined by a description contract which contains some combination of syntactic,semantic,and behavioral information.Based on the architecture,air combat simulation system can be described as an abstract composition of description contracts.It becomes concrete at run time as services that implement the constituent description contracts are discovered and bind.The whole process is a continuous run-time activity that responds to simulation needs and the availability of services.This provides benefits of implementation transparency and minimal dependency between models.Thus,simulation system can minimize the impact of change on it and increase the overall efficiency to respond to requirements change.

Hardware-in-the-loop simulation of communication networks

To enhance the fidelity and accuracy of the simulation of communication networks,hardware-in-the-loop（HITL） simulation was employed.HITL simulation methods was classified into three categories,of which the merits and shortages were compared.Combing system-in-the-loop（SITL） simulation principle with high level architecture（HLA）,an HITL simulation model of asynchronous transfer mode（ATM） network was constructed.The throughput and end-to-end delay of all-digital simulation and HITL simulation was analyzed,which showed that HITL simulation was more reliable and effectively improved the simulation credibility of communication network.Meanwhile,HLA-SITL method was fast and easy to achieve and low-cost during design lifecycle.Thus,it was a feasible way to research and analyze the large-scale network.

UltraStar:A Lightweight Simulator of Ultra-Dense LEO Satellite Constellation Networking for 6G

The mega-constellation network has gained significant attention recently due to its great potential in providing ubiquitous and high-capacity connectivity in sixth-generation(6G)wireless communication systems.However,the high dynamics of network topology and large scale of mega-constellation pose new challenges to the constellation simulation and performance evaluation.In this paper,we introduce UltraStar,a lightweight network simulator,which aims to facilitate the complicated simulation for the emerging mega-constellation of unprecedented scale.Particularly,a systematic and extensible architecture is proposed,where the joint requirement for network simulation,quantitative evaluation,data statistics and visualization is fully considered.For characterizing the network,we make lightweight abstractions of physical entities and models,which contain basic representatives of networking nodes,structures and protocol stacks.Then,to consider the high dynamics of Walker constellations,we give a two-stage topology maintenance method for constellation initialization and orbit prediction.Further,based on the discrete event simulation(DES)theory,a new set of discrete events is specifically designed for basic network processes,so as to maintain network state changes over time.Finally,taking the first-generation Starlink of 11927 low earth orbit(LEO)satellites as an example,we use UltraStar to fully evaluate its network performance for different deployment stages,such as characteristics of constellation topology,performance of end-to-end service and effects of network-wide traffic interaction.The simulation results not only demonstrate its superior performance,but also verify the effectiveness of UltraStar.

Modelling Spiking Neural Network from the Architecture Evaluation Perspective

The brain-inspired spiking neural network （SNN） computing paradigm offers the potential for low-power and scalable computing, suited to many intelligent tasks that conventional computational systems find difficult. On the other hand, NoC （network-on-chips） based very large scale integration （VLSI） systems have been widely used to mimic neuro- biological architectures （including SNNs）. This paper proposes an evaluation methodology for SNN applications from the aspect of micro-architecture. First, we extract accurate SNN models from existing simulators of neural systems, second, a cycle-accurate NoC simulator is implemented to execute the aforementioned SNN applications to get timing and energy-consumption information. We believe this method not only benefits the exploration of NoC design space but also bridges the gap between applications （especially those from the neuroscientists＇ community） and neuromorphic hardware. Based on the method, we have evaluated some typical SNNs in terms of timing and energy. The method is valuable for the development of neuromorphic hardware and applications.