A 4-12GHz wideband power amplifier,using a balanced configuration with a strip line Lange coupler, is designed and fabricated. This power amplifier shows a maximum continuous wave output power of 29.5dBm at 8GHz cente...A 4-12GHz wideband power amplifier,using a balanced configuration with a strip line Lange coupler, is designed and fabricated. This power amplifier shows a maximum continuous wave output power of 29.5dBm at 8GHz center frequency with an associated gain of 8.5dB and a gain flatness of ＋ /- 0.6dB in the 4-12GHz frequency range.展开更多
A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the...A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.展开更多
A C-band high efficiency and high gain two-stage power amplifier based on A1GaN/GaN high electron mobility transistor （HEMT） is designed and measured in this paper. The input and output impedances for the optimum po...A C-band high efficiency and high gain two-stage power amplifier based on A1GaN/GaN high electron mobility transistor （HEMT） is designed and measured in this paper. The input and output impedances for the optimum power-added efficiency （PAE） are determined at the fundamental and 2nd harmonic frequency （f0 and 2f0）. The harmonic manipulation networks are designed both in the driver stage and the power stage which manipulate the second harmonic to a very low level within the operating frequency band. Then the inter-stage matching network and the output power combining network are calculated to achieve a low insertion loss. So the PAE and the power gain is greatly improved. In an operation frequency range of 5,4 GHz-5.8 GHz in CW mode, the amplifier delivers a maximum output power of 18.62 W, with a PAE of 55.15 % and an associated power gain of 28.7 dB, which is an outstanding performance.展开更多
By using 0.15 μm GaAs pHEMT （pseudomorphic high electron mobility transistor） technology,a design of millimeter wave power amplifier microwave monolithic integrated circuit （MMIC） is presented.With careful optimi...By using 0.15 μm GaAs pHEMT （pseudomorphic high electron mobility transistor） technology,a design of millimeter wave power amplifier microwave monolithic integrated circuit （MMIC） is presented.With careful optimization on circuit structure,this two-stage power amplifier achieves a simulated gain of 15.5 dB with fluctuation of 1 dB from 33 GHz to 37 GHz.A simulated output power of more than 30 dBm in saturation can be drawn from 3 W DC supply with maximum power added efficiency （PAE） of 26%.Rigorous electromagnetic simulation is performed to make sure the simulation results are credible.The whole chip area is 3.99 mm2 including all bond pads.展开更多
The performance of the power amplifier determines the detection capability of 77 GHz automotive radar, and the bias circuit is one of the most important parts of a silicon-germanium power amplifier. In this paper,we d...The performance of the power amplifier determines the detection capability of 77 GHz automotive radar, and the bias circuit is one of the most important parts of a silicon-germanium power amplifier. In this paper,we discussed and designed an on-chip bias circuit based on a silicon-germanium heterojunction bipolar transistor,which is used for the W-band silicon-germanium power amplifier. Considering the low breakdown voltage and the correlation between characteristic frequency and bias current density of the silicon-germanium heterojunction bipolar transistor, the bias circuit is designed to improve the breakdown voltage of the power amplifier and meet the W band characteristic frequency at the same time. The simulation results show that the designed bias circuit can make the amplifier operate normally from-40 to 125 ℃. In addition, the output power and smooth controllability of the power amplifier can be adjusted by controlling the bias circuit.展开更多
A 2.4-GHz SiGe HBT power amplifier （PA） with a novel bias current controlling circuit has been realized in IBM 0.35-μm SiGe BiCMOS technology, BiCMOS5PAe. The bias circuit switches the quiescent current to make the...A 2.4-GHz SiGe HBT power amplifier （PA） with a novel bias current controlling circuit has been realized in IBM 0.35-μm SiGe BiCMOS technology, BiCMOS5PAe. The bias circuit switches the quiescent current to make the PA operate in a high or low power mode. Under a single supply voltage of ＋3.5 V, the two-stage mode-switchable power amplifier provides a PAE improvement up to 56.7% and 19.2% at an output power of 0 and 20 dBm, respec- tively, with a reduced quiescent current in the low power mode as compared to only operating the PA in the high power mode. The die size is only 1.32×1.37mm^2.展开更多
With the rapid growth of complexity and functionality of modern electronic systems, creating precise behavioral models of nonlinear circuits has become an attractive topic. Deep neural networks (DNNs) have been recogn...With the rapid growth of complexity and functionality of modern electronic systems, creating precise behavioral models of nonlinear circuits has become an attractive topic. Deep neural networks (DNNs) have been recognized as a powerful tool for nonlinear system modeling. To characterize the behavior of nonlinear circuits, a DNN based modeling approach is proposed in this paper. The procedure is illustrated by modeling a power amplifier (PA), which is a typical nonlinear circuit in electronic systems. The PA model is constructed based on a feedforward neural network with three hidden layers, and then Multisim circuit simulator is applied to generating the raw training data. Training and validation are carried out in Tensorflow deep learning framework. Compared with the commonly used polynomial model, the proposed DNN model exhibits a faster convergence rate and improves the mean squared error by 13 dB. The results demonstrate that the proposed DNN model can accurately depict the input-output characteristics of nonlinear circuits in both training and validation data sets.展开更多
A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control ...A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.展开更多
文摘A 4-12GHz wideband power amplifier,using a balanced configuration with a strip line Lange coupler, is designed and fabricated. This power amplifier shows a maximum continuous wave output power of 29.5dBm at 8GHz center frequency with an associated gain of 8.5dB and a gain flatness of ＋ /- 0.6dB in the 4-12GHz frequency range.
基金The National High Technology Research and Development Program of China(863 Program)(No.2009AA01Z260)
文摘A monolithic microwave integrated circuit （MMIC） power amplifier （PA） is proposed. It adopts a new on-chip bias circuit, which not only avoids the instability of the direct current bias caused by the change in the power supply and temperature, but also compensates deviations caused by the increase in input power. The bias circuit is a current-mirror configuration, and the feedback circuit helps to maintain bias voltage at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. A shunt capacitor at the base node of the active bias transistor enhances the linearity of the PA. The chip is fabricated in an InGaP/GaAs heterojunction bipolar transistor （HBT） process. Measured results exhibit a 26. 6-dBm output compression point, 33.6% power-added efficiency （PAE） and - 40.2 dBc adjacent channel power ratio （ACPR） for wide-band code division multiple access （W-CDMA） applications.
基金Project supported by the National Key Basic Research Program of China(Grant No.2011CBA00606)Program for New Century Excellent Talents in University,China(Grant No.NCET-12-0915)the National Natural Science Foundation of China(Grant No.61334002)
文摘A C-band high efficiency and high gain two-stage power amplifier based on A1GaN/GaN high electron mobility transistor （HEMT） is designed and measured in this paper. The input and output impedances for the optimum power-added efficiency （PAE） are determined at the fundamental and 2nd harmonic frequency （f0 and 2f0）. The harmonic manipulation networks are designed both in the driver stage and the power stage which manipulate the second harmonic to a very low level within the operating frequency band. Then the inter-stage matching network and the output power combining network are calculated to achieve a low insertion loss. So the PAE and the power gain is greatly improved. In an operation frequency range of 5,4 GHz-5.8 GHz in CW mode, the amplifier delivers a maximum output power of 18.62 W, with a PAE of 55.15 % and an associated power gain of 28.7 dB, which is an outstanding performance.
基金supported by the Innovation Fund of State Key Lab of Millimeter Waves
文摘By using 0.15 μm GaAs pHEMT （pseudomorphic high electron mobility transistor） technology,a design of millimeter wave power amplifier microwave monolithic integrated circuit （MMIC） is presented.With careful optimization on circuit structure,this two-stage power amplifier achieves a simulated gain of 15.5 dB with fluctuation of 1 dB from 33 GHz to 37 GHz.A simulated output power of more than 30 dBm in saturation can be drawn from 3 W DC supply with maximum power added efficiency （PAE） of 26%.Rigorous electromagnetic simulation is performed to make sure the simulation results are credible.The whole chip area is 3.99 mm2 including all bond pads.
文摘The performance of the power amplifier determines the detection capability of 77 GHz automotive radar, and the bias circuit is one of the most important parts of a silicon-germanium power amplifier. In this paper,we discussed and designed an on-chip bias circuit based on a silicon-germanium heterojunction bipolar transistor,which is used for the W-band silicon-germanium power amplifier. Considering the low breakdown voltage and the correlation between characteristic frequency and bias current density of the silicon-germanium heterojunction bipolar transistor, the bias circuit is designed to improve the breakdown voltage of the power amplifier and meet the W band characteristic frequency at the same time. The simulation results show that the designed bias circuit can make the amplifier operate normally from-40 to 125 ℃. In addition, the output power and smooth controllability of the power amplifier can be adjusted by controlling the bias circuit.
基金supported by the City University of Hong Kong(Nos.700182,7002007)
文摘A 2.4-GHz SiGe HBT power amplifier （PA） with a novel bias current controlling circuit has been realized in IBM 0.35-μm SiGe BiCMOS technology, BiCMOS5PAe. The bias circuit switches the quiescent current to make the PA operate in a high or low power mode. Under a single supply voltage of ＋3.5 V, the two-stage mode-switchable power amplifier provides a PAE improvement up to 56.7% and 19.2% at an output power of 0 and 20 dBm, respec- tively, with a reduced quiescent current in the low power mode as compared to only operating the PA in the high power mode. The die size is only 1.32×1.37mm^2.
文摘With the rapid growth of complexity and functionality of modern electronic systems, creating precise behavioral models of nonlinear circuits has become an attractive topic. Deep neural networks (DNNs) have been recognized as a powerful tool for nonlinear system modeling. To characterize the behavior of nonlinear circuits, a DNN based modeling approach is proposed in this paper. The procedure is illustrated by modeling a power amplifier (PA), which is a typical nonlinear circuit in electronic systems. The PA model is constructed based on a feedforward neural network with three hidden layers, and then Multisim circuit simulator is applied to generating the raw training data. Training and validation are carried out in Tensorflow deep learning framework. Compared with the commonly used polynomial model, the proposed DNN model exhibits a faster convergence rate and improves the mean squared error by 13 dB. The results demonstrate that the proposed DNN model can accurately depict the input-output characteristics of nonlinear circuits in both training and validation data sets.
文摘A common current source, generally used to bias cross-coupled differential amplifiers in a transconductor, controls third harmonic distortion (HD3) poorly. Separate current sources are shown to provide better control on HD3) . In this paper, a detailed design and analysis is presented for a transconductor made using this biasing technique. The transconductor, in addition, is made to offer high Gm, low power dissipation and is designed for linearly tunable Gm with current mode load as one of the applications. The circuit exhibits HD3) of less than –43.7 dB, high current efficiency of 1.18 V-1 and Gm of 390 μS at 1 VGp-p @ 50 MHz. UMC 0.18 μm CMOS process technology is used for simulation at supply voltage of 1.8 V.
