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基于数学形态学的红外点目标实时检测算法及其CPLD实现 被引量:5
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作者 刘士建 郭立 +1 位作者 段勃 朱俊株 《中国科学技术大学学报》 CAS CSCD 北大核心 2004年第3期366-370,共5页
基于数学形态学提出了一种红外图像序列中点目标的检测算法及其硬件系统的实现 .首先介绍了基于数学形态学的点目标检测算法的基本原理 ,然后根据算法的特点提出了它在CPLD上的并行流水线实现方法 ,最后给出并分析了算法软件和硬件系统... 基于数学形态学提出了一种红外图像序列中点目标的检测算法及其硬件系统的实现 .首先介绍了基于数学形态学的点目标检测算法的基本原理 ,然后根据算法的特点提出了它在CPLD上的并行流水线实现方法 ,最后给出并分析了算法软件和硬件系统的仿真结果 .结果表明该方法可以快速、可靠地检测出低信杂比红外图像序列中的点目标 ,且系统结构简单 ,无需存储器 。 展开更多
关键词 红外图像 点目标检测 形态学 complex PROGRAMMABLE logic device(cpld)
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Test system for miniature pulse-powered photoelectric invert switch based on CPLD
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作者 王欢 唐波 李祖博 《Journal of Measurement Science and Instrumentation》 CAS CSCD 2015年第1期36-40,共5页
For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert s... For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert switch is presented to verify the reliability of the invert switch. The test system uses complex programmable logic device (CPLD) to control data acquisition of A/D converter and data storage of external flash memory, and then transmits the acquired data to a computer for data analysis and processing. The test system can provide the required sampling frequency of the signal in high temperature, normal temperature and low temperature environments, and the reliability of the invert switch can be verified according to the signal parameters. The results show that the test system has high precision and the tested invert switch has low power consumption and high reliability. 展开更多
关键词 invert switch storage measurement technology complex programmable logic device cpld test system
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一种多通道脉冲计数器的EDA方法设计 被引量:2
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作者 姚海军 《科学技术与工程》 2009年第14期4006-4011,共6页
介绍了用CPLD+HDL的EDA技术作为开发手段,实现对多通道的脉冲信号计数的脉冲计数器的设计,并利用单片机将计数结果传给上位机,论述了基于VHDL语言和芯片的数字系统的设计思想和过程,通过对设计结果的系统仿真波形分析,验证了计数器设计... 介绍了用CPLD+HDL的EDA技术作为开发手段,实现对多通道的脉冲信号计数的脉冲计数器的设计,并利用单片机将计数结果传给上位机,论述了基于VHDL语言和芯片的数字系统的设计思想和过程,通过对设计结果的系统仿真波形分析,验证了计数器设计的正确性。 展开更多
关键词 多通道 脉冲计数器 复杂可编程逻辑器件(Conplex PROGRAMMABLE Logic Device cpld) 甚高速数字电路硬 件描述语言(Very-Higl—Speed Integrated Circint Hardware Description Language VHDL) 波形仿真 单片机
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THE DESIGN OF VMEBUS BRIDGE CONTROLLER WITH SHARC BUS
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作者 Wang Min Wu Shunjun Su Tao 《Journal of Electronics(China)》 2005年第6期632-639,共8页
Targeting at the high expense and inflexibility to realize VMEbus bridge controller by professional Integrated Circuit (IC), this paper presents a scheme of adopting CPLD/FPGA (Complicated Programmable Logic Device/Fi... Targeting at the high expense and inflexibility to realize VMEbus bridge controller by professional Integrated Circuit (IC), this paper presents a scheme of adopting CPLD/FPGA (Complicated Programmable Logic Device/Field Programmable Gate Array) to design bridge controller between VMEbus and local bus. SHARC DSP (Digital Signal Processor) bus is an example. It has functions of nearly entire master/slave interface of VMEbus, and can act as DMA (Direct Memory Access) controller and perform block transfer in DMA or master processor initiative way without length limit. External circuit of the design is very simple. In comparison with special ICs, it has high performance to price ratio and can be easily applied to local buses of other processors with quite a little modification. 展开更多
关键词 VMEBUS Bridge controller Complicated Programmable Logic Device(cpld Master SLAVE SHARC bus
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A driving pulse edge modulation technique and its complex programming logic devices implementation 被引量:1
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作者 Xiao CHEN Dong-chang QU +1 位作者 Yong GUO Guo-zhu CHEN 《Frontiers of Information Technology & Electronic Engineering》 SCIE EI CSCD 2015年第12期1088-1098,共11页
With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insul... With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insulated gate bipolar transistors(IGBTs). By modulating the density and width of the pulse trains, without regulating the hardware circuit, the slope of the gate driving voltage is controlled to change the switching speed. This technique is used in the driving circuit based on complex programmable logic devices(CPLDs), and the switching voltage spike of IGBTs can be restrained through software, which is easier and more flexible to adjust. Experimental results demonstrate the effectiveness and practicability of the proposed method. 展开更多
关键词 Driving pulse edge modulation Switching voltage spike Complex programmable logic device(cpld) Active gate drive
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