Quantum algorithm for minimum dominating set problem with circuit design

Using quantum algorithms to solve various problems has attracted widespread attention with the development of quantum computing.Researchers are particularly interested in using the acceleration properties of quantum algorithms to solve NP-complete problems.This paper focuses on the well-known NP-complete problem of finding the minimum dominating set in undirected graphs.To expedite the search process,a quantum algorithm employing Grover’s search is proposed.However,a challenge arises from the unknown number of solutions for the minimum dominating set,rendering direct usage of original Grover’s search impossible.Thus,a swap test method is introduced to ascertain the number of iterations required.The oracle,diffusion operators,and swap test are designed with achievable quantum gates.The query complexity is O(1.414^(n))and the space complexity is O(n).To validate the proposed approach,qiskit software package is employed to simulate the quantum circuit,yielding the anticipated results.

Nullors, and Nullor Circuits;There Applications in Symbolic Circuit Analysis and Design

The objective in this presentation is to introduce some of the unique properties and applications of nullors in active circuit analysis and designs. The emphasis is to discuss the role nullors can play in symbolic representation of transfer functions. To show this we adopt the topological platform for the circuit analysis and use a recently developed Admittance Method (AM) to achieve the Sum of Tree Products (STP), replacing the determinant and cofactors of the Nodal Admittance Matrix (NAM) of the circuit. To construct a transfer function, we start with a given active circuit and convert all its controlled sources and I/O-ports to nullors. Now, with a solid nullor circuit (passive elements and nullors) we first eliminate the passive elements through AM operations. This produces the STPs. Second, the all-nullor circuit is then used to find the signs or the STPs. Finally, the transfer function (in symbolic, if chosen) is obtained from the ratio between the STPs.

MET receptor tyrosine kinase promotes the generation of functional synapses in adult cortical circuits

Loss of synapse and functional connectivity in brain circuits is associated with aging and neurodegeneration,however,few molecular mechanisms are known to intrinsically promote synaptogenesis or enhance synapse function.We have previously shown that MET receptor tyrosine kinase in the developing cortical circuits promotes dendritic growth and dendritic spine morphogenesis.To investigate whether enhancing MET in adult cortex has synapse regenerating potential,we created a knockin mouse line,in which the human MET gene expression and signaling can be turned on in adult(10–12 months)cortical neurons through doxycycline-containing chow.We found that similar to the developing brain,turning on MET signaling in the adult cortex activates small GTPases and increases spine density in prefrontal projection neurons.These findings are further corroborated by increased synaptic activity and transient generation of immature silent synapses.Prolonged MET signaling resulted in an increasedα-amino-3-hydroxy-5-methyl-4-isoxazolepropionic acid/N-methyl-Daspartate(AMPA/NMDA)receptor current ratio,indicative of enhanced synaptic function and connectivity.Our data reveal that enhancing MET signaling could be an interventional approach to promote synaptogenesis and preserve functional connectivity in the adult brain.These findings may have implications for regenerative therapy in aging and neurodegeneration conditions.

Research on Switching Characteristics Based on Optimization Design of SiC MOSFET Drive Circuit

With the increasing emphasis on energy conservation,emission reduction and environmental protection,the application prospect of SiC power devices is becoming more and more broad.In the high frequency application of SiC MOSFET,the change rate of voltage and current in the turn-on and turn-off process increases with the increase of switching frequency.Also,the current and voltage spike oscillation phenomenon is gradually intensified due to the influence of circuit stray parameters.Based on the analysis of SiC MOSFET characteristics,the paper discusses the design requirements and design principles of SiC MOSFET drive circuit.Then,taking the SiC module C2M0080120D of Cree Company as an example,a driver circuit design is realized through the ACPL-355JC optocoupler driver module of Broadcom Company.The circuit not only has the characteristics of fast transmission delay and excellent performance,but also has the functions of overload and short circuit protection.The driving circuit is verified by LTspice simulation software,and the switching characteristics of SiC MOSFET under different working conditions are studied in depth.The experimental results show that the driving circuit can improve the switching time of SiC MOSFET and effectively solve the problem of current and voltage spike oscillation,which lays a foundation for the practical application of SiC MOSFET in the future.

Design of Cold-Junction Compensation and Disconnection Detection Circuits of Various Thermocouples and Implementation of Multi-Channel Interfaces Using Them-A Secondary Publication

Cold-junction compensation(CJC)and disconnection detection circuit design of various thermocouples(TC)and multi-channel TC interface circuits were designed.The CJC and disconnection detection circuit consists of a CJC semiconductor device,an instrumentation amplifier(IA),two resistors,and a diode for disconnection detection.Based on the basic circuit,a multi-channel interface circuit was also implemented.The CJC was implemented using compensation semiconductor and IA,and disconnection detection was detected by using two resistors and a diode so that IA input voltage became-0.42 V.As a result of the experiment using R-type TC,the error of the designed circuit was reduced from 0.14 mV to 3μV after CJC in the temperature range of 0°C to 1400°C.In addition,it was confirmed that the output voltage of IA was saturated from 88 mV to-14.2 V when TC was disconnected from normal.The output voltage of the designed circuit was 0 V to 10 V in the temperature range of 0°C to 1400°C.The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel.The implemented multi-channel interface has a feature that can be applied equally to E,J,K,T,R,and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

Design and implementation of GM- APD array readout circuit for infrared imaging

Based on an avalanche photodiode（ APD） detecting array working in Geiger mode（ GM-APD）, a high-performance infrared sensor readout integrated circuit（ ROIC） used for infrared 3D（ three-dimensional） imaging is proposed. The system mainly consists of three functional modules, including active quenching circuit（ AQC）, time-to-digital converter（ TDC） circuit and other timing controller circuit. Each AQC and TDC circuit together constitutes the pixel circuit. Under the cooperation with other modules, the current signal generated by the GM-APD sensor is detected by the AQC, and the photon time-of-flight（ TOF） is measured and converted to a digital signal output to achieve a better noise suppression and a higher detection sensitivity by the TDC. The ROIC circuit is fabricated by the CSMC 0. 5 μm standard CMOS technology. The array size is 8 × 8, and the center distance of two adjacent cells is 100μm. The measurement results of the chip showthat the performance of the circuit is good, and the chip can achieve 1 ns time resolution with a 250 MHz reference clock, and the circuit can be used in the array structure of the infrared detection system or focal plane array（ FPA）.

Design and Realization of CPW Circuits Using EC-ANN Models for CPW Discontinuities

Novel accurate and efficient equivalent circuit trained artificial neural-network （EC-ANN） models,which inherit and improve upon EC model and EM-ANN models＇ advantages,are developed for coplanar waveguide （CPW） discontinuities. Modeled discontinuities include ： CPW step, interdigital capacitor, symmetric cross junction, and spiral inductor, for which validation tests are performed. These models allow for circuit design, simulation, and optimization within a CAD simulator. Design and realization of a coplanar lumped element band pass filter on GaAs using the developed CPW EC-ANN models are demonstrated.

Analysis and design of sigma-delta interface circuit for quartz flexural pendulum accelerometer

For the high resolution required in a digital interface circuit of an accelerometer used in feeble gravity measurement, a switched-capacitor （SC） sigma-delta modulator （SDM） is proposed. Based on the principle and the topology structure of the SDMs, the influence of oversampling ratio, bits of an internal quantizer and the cascaded structure on weak signal detecting precision is analyzed, and an ideal low-distortion SDM with a second-order 1-bit structure satisfying the high- resolution interface circuit of an accelerometer is designed. With the research on non-idealities of each SDM block in the SC circuit implementation and their impacts on power consumption, the realized parameters of low-power SDMs based on different bandwidths are devised and the power consumption of each SDM is estimated. Time-domain behavioral simulation is explored based on Simulink. The results demonstrate that a 21- bit resolution of the designed SDMs can be achieved on the premise of low power, and the parameters for the circuit implementation can be directed to the transistor-level circuit design.

水田动力底盘逆向建模与质心验证——基于Geomagic Design X

针对目前农业机械仿真和优化模型精度不高的问题,提出了一种构建精确模型的逆向建模方法。应用光学扫描仪采集点云数据,基于Geomagic Design X处理点云数据并重构零部件模型,在SolidWorks中完成水田动力底盘的装配。以VP6D-CQ型水田动力底盘为例,将测得的实际质心位置与所建的模型质心位置进行比较,并对提出的逆向建模方法进行了试验验证以及误差分析。结果表明:总质量、x坐标、y坐标、z坐标的误差值分别为4.55%、3.62%、2.23%、4.81%,误差值均在5%内。此方法可构建准确的三维模型,为后续仿真优化数据精确性奠定了基础,与传统的研发相比较,可缩短农业机械研发周期、降低设计成本。

A new Rsslor hyperchaotic system and its realization with systematic circuit parameter design

Based on two modified Rosslor hyperchaotic systems, which are derived from the chaotic Rosslor system by introducing a state feedback controller, this paper proposes a new switched Rosslor hyperchaotic system. The switched system contains two different hyperchaotic systems and can change its behaviour continuously from one to another via a switching function. On the other hand, it presents a systematic method for designing the circuit of realizing the proposed hyperchaotic system. In this design, circuit state equations are written in normalized dimensionless form by rescaling the time variable. Furthermore, an analogous circuit is designed by using the proposed method and built for verifying the new hyperchaos and the design method. Experimental results show a good agreement between numerical simulations and experimental results.

DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT

First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks--Clocked Transmission Gate Adiabatic Logic （CTGAL） circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor （NMOS） and Complementary Metal Oxide Semiconductor （CMOS） latch structure. Finally, with the parameters of Taiwan Semiconductor Manufacturing Company （TSMC） 0.25um CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic （BCRL） and Pass-transistor Adiabatic Logic （PAL） including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.

SOME COMBINATORIAL OPTIMIZATION PROBLEMS ARISING FROM VLSI CIRCUIT DESIGN

This paper is basically a survey to show a number of combinatorial optimization problems arising from VLSI circuit design. Some of them including the existence problem, minimax problem, net representation, bend minimization, area minimization, placement problem, routing problem, etc. are especially discussed with new results and theoretical ideas for treating them. Finally, a number of problems for further research are mentioned.

A review on the design of ternary logic circuits

A multi-valued logic system is a promising alternative to traditional binary logic because it can reduce the complexity,power consumption, and area of circuit implementation. This article briefly summarizes the development of ternary logic and its advantages in digital logic circuits. The schemes, characteristics, and application of ternary logic circuits based on CMOS, CNTFET, memristor, and other devices and processes are reviewed in this paper, providing some reference for the further research and development of ternary logic circuits.

App Designer辅助教学方法探索与实践——以软件无线电课程为例

软件无线电作为通信学科的必修课程,具有承上启下的重要作用。因课程原理抽象、理论公式复杂,学员在学习过程存在理解掌握难、实践应用难等问题。通过对当前软件无线电教学过程中存在的不足与困难进行分析,提出利用MATLAB App Designer辅助课程教学,从教学准备、课堂互动、自主实验、反馈提升四个方面开展课程教学改革。实践表明,该方法对于提升学员的工程思维、系统思维具有显著效果,同时可以增强学员理论联系实际的能力。

基于MATLAB_App Designer电力电子虚拟仿真实验系统设计

根据MATLAB_App Designer提供的界面布局功能,运用MATLAB_Simulink搭建电力电子仿真模型,设计了一套人机交互式电力电子技术仿真实验系统。该系统包含典型的电力电子仿真模型和实例,可以帮助学生和工程技术人员学习电力电子电路的工作原理,分析和研究参数设置对电路电压、电流等波形的影响,有利于提高学习者对电力电子技术的研究和设计能力。

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.

High performance integrated photonic circuit based on inverse design method

The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.

LOW-FREQUENCY LOW-NOISE CIRCUITS DESIGN USING AN E_n-I_n MODEL

In view of the limitations of a Rn-Gn model in the low frequency range and the defects of an En-In model in common use now, this paper builds a complete En-In model according to the theory of random harmonic. The parameters for the low-noise design such as the equivalent input noisy voltage Ens, the optimum source impedance Zsopt and the minimum noise figure Fmin can be calculated accurately by using this En-In model because it considers the coherence between the noise sources fully. Moreover, this paper points out that it will cause the maximum 30% miscalculation when neglecting the effects of the correlation coefficient 7. Using the series-series circuits as an example, this paper discusses the methods for the En-In noise analysis of electronic circuits preliminarily and demonstrates its correctness through the comparison between the simulated and measured results of the minimum noise figure Fmin of a single current series negative feedback circuit.

Design and realization of synchronization circuit for GPS software receiver based on FPGA

With research on the carrier phase synchronization and symbol synchronization algorithm of demodulation module, a synchronization circuit system is designed for GPS software receiver based on field programmable gate array （FPGA）, and a series of experiment is done on the hardware platform. The result shows the all-digital synchronization and demodulation of GPS intermediate frequency （IF） signal can be realized and applied in embedded real-time GPS software receiver system. It is verified that the decision-directed joint tracking algorithm of carrier phase and symbol timing for received signals from GPS is reasonable. In addition, the loop works steadily and can be used for receiving GPS signals using synchronous demodulation. The synchronization circuit for GPS software receiver designed based on FPGA has the features of low cost, miniaturization, low power and real-time. Surely, it will become one of the development directions for GPS and even GNSS embedded real-time software receiver.

DESIGN OF TERNARY CURRENT-MODE CMOS CIRCUITS BASED ON SWITCH-SIGNAL THEORY

By applying switch-signal theory, the interaction between MOS transmission switch-ing transistor and current signal in current-mode CMOS circuits is analyzed, and the theory oftransmission current-switches which is suitable to current-mode CMOS circuits is proposed. Thecircuits, such as ternary full-adder etc., designed by using this theory have simpler circuit struc-tures and correct logic functions. It is confirmed that this theory is efficient in guiding the logicdesign of current-mode CMOS circuits at switch level.