By analyzing the structures of circuits,a novel approach for signal probability estimation of very large-scale integration(VLSI)based on the improved weighted averaging algorithm(IWAA)is proposed.Considering the failu...By analyzing the structures of circuits,a novel approach for signal probability estimation of very large-scale integration(VLSI)based on the improved weighted averaging algorithm(IWAA)is proposed.Considering the failure probability of the gate,first,the first reconvergent fan-ins corresponding to the reconvergent fan-outs were identified to locate the important signal correlation nodes based on the principle of homologous signal convergence.Secondly,the reconvergent fan-in nodes of the multiple reconverging structure in the circuit were identified by the sensitization path to determine the interference sources to the signal probability calculation.Then,the weighted signal probability was calculated by combining the weighted average approach to correct the signal probability.Finally,the reconvergent fan-out was quantified by the mixed-calculation strategy of signal probability to reduce the impact of multiple reconvergent fan-outs on the accuracy.Simulation results on ISCAS85 benchmarks circuits show that the proposed method has approximate linear time-space consumption with the increase in the number of the gate,and its accuracy is 4.2%higher than that of the IWAA.展开更多
The atomristor(monolayer two-dimensional(2D)-material memristor)is competitive in high-speed logic computing due to its binary feature,lower energy consumption,faster switch response,and so on.Yet to date,all-atomrist...The atomristor(monolayer two-dimensional(2D)-material memristor)is competitive in high-speed logic computing due to its binary feature,lower energy consumption,faster switch response,and so on.Yet to date,all-atomristor logic gates used for logic computing have not been reported due to the poor consistency of different atomristors in performance.Here,by studying band structures and electron transport properties of MoS2 atomristor,a comprehensive memristive mechanism is obtained.Guided by the simulation results,monolayer MoS2 with moderated defect concentration has been fabricated in the experiment,which can build atomristors with high performance and good consistency.Based on this,for the first time,MoS2 all-atomristor logic gates are realized successfully.As a demonstration,a half-adder based on the logic gates and a binary neural network(BNN)based on crossbar arrays are evaluated,indicating the applicability in various logic computing circumstances.Owing to shorter transition time and lower energy consumption,all-atomristor logic gates will open many new opportunities for next-generation logic computing and data processing.展开更多
基金The National Natural Science Foundation of China(No.61502422)the Natural Science Foundation of Zhejiang Province(No.LY18F020028,LQ15F020006)the Natural Science Foundation of Zhejiang University of Technology(No.2014XY007)
文摘By analyzing the structures of circuits,a novel approach for signal probability estimation of very large-scale integration(VLSI)based on the improved weighted averaging algorithm(IWAA)is proposed.Considering the failure probability of the gate,first,the first reconvergent fan-ins corresponding to the reconvergent fan-outs were identified to locate the important signal correlation nodes based on the principle of homologous signal convergence.Secondly,the reconvergent fan-in nodes of the multiple reconverging structure in the circuit were identified by the sensitization path to determine the interference sources to the signal probability calculation.Then,the weighted signal probability was calculated by combining the weighted average approach to correct the signal probability.Finally,the reconvergent fan-out was quantified by the mixed-calculation strategy of signal probability to reduce the impact of multiple reconvergent fan-outs on the accuracy.Simulation results on ISCAS85 benchmarks circuits show that the proposed method has approximate linear time-space consumption with the increase in the number of the gate,and its accuracy is 4.2%higher than that of the IWAA.
基金This work was supported by the National Natural Science Foundation of China(Nos.51971070,10974037,and 62205011)the National Key Research and Development Program of China(No.2016YFA0200403)+4 种基金Eu-FP7 Project(No.247644)CAS Strategy Pilot Program(No.XDA 09020300)Fundamental Research Funds for the Central Universities(No.buctrc202122)the Open Research Project of Zhejiang province Key Laboratory of Quantum Technology and Device(No.20220401)the Open Research Project of Special Display and Imaging Technology Innovation Center of Anhui Province(No.2022AJ05001).
文摘The atomristor(monolayer two-dimensional(2D)-material memristor)is competitive in high-speed logic computing due to its binary feature,lower energy consumption,faster switch response,and so on.Yet to date,all-atomristor logic gates used for logic computing have not been reported due to the poor consistency of different atomristors in performance.Here,by studying band structures and electron transport properties of MoS2 atomristor,a comprehensive memristive mechanism is obtained.Guided by the simulation results,monolayer MoS2 with moderated defect concentration has been fabricated in the experiment,which can build atomristors with high performance and good consistency.Based on this,for the first time,MoS2 all-atomristor logic gates are realized successfully.As a demonstration,a half-adder based on the logic gates and a binary neural network(BNN)based on crossbar arrays are evaluated,indicating the applicability in various logic computing circumstances.Owing to shorter transition time and lower energy consumption,all-atomristor logic gates will open many new opportunities for next-generation logic computing and data processing.
