This paper presents the design and experimental results of a continuous-time (CT) sigma-delta (ΣΔ) modulator with data-weighted average (DWA) technology for WiMAX applications. The proposed modulator comprises a thi...This paper presents the design and experimental results of a continuous-time (CT) sigma-delta (ΣΔ) modulator with data-weighted average (DWA) technology for WiMAX applications. The proposed modulator comprises a third-order active RC loop filter, internal quantizer operating at 160 MHz and three DAC circuits. A multi-bit quantizer is used to increase resolution and multi-bit non-return-to-zero (NRZ) DACs are adopted to reduce clock jitter sensitivity. The NRZ DAC circuits with quantizer excess loop delay compensation are set to be half the sampling period of the quantizer for increasing modulator stability. A dynamic element matching (DEM) technique is applied to multi-bit ΣΔ modulators to improve the nonlinearity of the internal DAC. This approach translates the harmonic distortion components of a nonideal DAC in the feedback loop of a ΣΔ modulator to high-frequency components. Capacitor tuning is utilized to overcome loop coefficient shifts due to process variations. The DWA technique is used for reducing DAC noise due to component mismatches. The prototype is implemented in TSMC 0.18 um CMOS process. Experimental results show that the ΣΔ modulator achieves 54-dB dynamic range, 51-dB SNR, and 48-dB SNDR over a 10-MHz signal bandwidth with an oversampling ratio (OSR) of 8, while dissipating 19.8 mW from a 1.2-V supply. Including pads, the chip area is 1.156 mm2.展开更多
介绍了一种用8位精简指令集计算机(Recluced Instraction Set Computer,RISC)结构单片机中将PWM波转换为模拟电压输出的D/A转换的实现方法。分析了脉宽调制(PWM)频率、占空比调节精度和积分器之间的关系。在此基础上设计出一种使用AVR...介绍了一种用8位精简指令集计算机(Recluced Instraction Set Computer,RISC)结构单片机中将PWM波转换为模拟电压输出的D/A转换的实现方法。分析了脉宽调制(PWM)频率、占空比调节精度和积分器之间的关系。在此基础上设计出一种使用AVR系列单片机MEGA16内部定时/计数器产生PWM信号,再利用通用电路把PWM信号转换成直流电压信号的硬件电路。其最大线性误差只有0.5%,且成本低廉。展开更多
文摘This paper presents the design and experimental results of a continuous-time (CT) sigma-delta (ΣΔ) modulator with data-weighted average (DWA) technology for WiMAX applications. The proposed modulator comprises a third-order active RC loop filter, internal quantizer operating at 160 MHz and three DAC circuits. A multi-bit quantizer is used to increase resolution and multi-bit non-return-to-zero (NRZ) DACs are adopted to reduce clock jitter sensitivity. The NRZ DAC circuits with quantizer excess loop delay compensation are set to be half the sampling period of the quantizer for increasing modulator stability. A dynamic element matching (DEM) technique is applied to multi-bit ΣΔ modulators to improve the nonlinearity of the internal DAC. This approach translates the harmonic distortion components of a nonideal DAC in the feedback loop of a ΣΔ modulator to high-frequency components. Capacitor tuning is utilized to overcome loop coefficient shifts due to process variations. The DWA technique is used for reducing DAC noise due to component mismatches. The prototype is implemented in TSMC 0.18 um CMOS process. Experimental results show that the ΣΔ modulator achieves 54-dB dynamic range, 51-dB SNR, and 48-dB SNDR over a 10-MHz signal bandwidth with an oversampling ratio (OSR) of 8, while dissipating 19.8 mW from a 1.2-V supply. Including pads, the chip area is 1.156 mm2.
文摘介绍了一种用8位精简指令集计算机(Recluced Instraction Set Computer,RISC)结构单片机中将PWM波转换为模拟电压输出的D/A转换的实现方法。分析了脉宽调制(PWM)频率、占空比调节精度和积分器之间的关系。在此基础上设计出一种使用AVR系列单片机MEGA16内部定时/计数器产生PWM信号,再利用通用电路把PWM信号转换成直流电压信号的硬件电路。其最大线性误差只有0.5%,且成本低廉。
