During faults in a distribution network,the output power of a distributed generation(DG)may be uncertain.Moreover,the output currents of distributed power sources are also affected by the output power,resulting in unc...During faults in a distribution network,the output power of a distributed generation(DG)may be uncertain.Moreover,the output currents of distributed power sources are also affected by the output power,resulting in uncertainties in the calculation of the short-circuit current at the time of a fault.Additionally,the impacts of such uncertainties around short-circuit currents will increase with the increase of distributed power sources.Thus,it is very important to develop a method for calculating the short-circuit current while considering the uncertainties in a distribution network.In this study,an affine arithmetic algorithm for calculating short-circuit current intervals in distribution networks with distributed power sources while considering power fluctuations is presented.The proposed algorithm includes two stages.In the first stage,normal operations are considered to establish a conservative interval affine optimization model of injection currents in distributed power sources.Constrained by the fluctuation range of distributed generation power at the moment of fault occurrence,the model can then be used to solve for the fluctuation range of injected current amplitudes in distributed power sources.The second stage is implemented after a malfunction occurs.In this stage,an affine optimization model is first established.This model is developed to characterizes the short-circuit current interval of a transmission line,and is constrained by the fluctuation range of the injected current amplitude of DG during normal operations.Finally,the range of the short-circuit current amplitudes of distribution network lines after a short-circuit fault occurs is predicted.The algorithm proposed in this article obtains an interval range containing accurate results through interval operation.Compared with traditional point value calculation methods,interval calculation methods can provide more reliable analysis and calculation results.The range of short-circuit current amplitude obtained by this algorithm is slightly larger than those obtained using the Monte Carlo algorithm and the Latin hypercube sampling algorithm.Therefore,the proposed algorithm has good suitability and does not require iterative calculations,resulting in a significant improvement in computational speed compared to the Monte Carlo algorithm and the Latin hypercube sampling algorithm.Furthermore,the proposed algorithm can provide more reliable analysis and calculation results,improving the safety and stability of power systems.展开更多
针对目前利用FPGA实现基于分布式算法(DA)FIR滤波器的不足,以及为了实现高速FIR滤波器,提出了一种位并行分布式算法结构的解决方案。采用位并行分布式算法和流水线式并行加法器树,在Xilinx Virtex5系列FPGA上实现了高速FIR滤波器。该滤...针对目前利用FPGA实现基于分布式算法(DA)FIR滤波器的不足,以及为了实现高速FIR滤波器,提出了一种位并行分布式算法结构的解决方案。采用位并行分布式算法和流水线式并行加法器树,在Xilinx Virtex5系列FPGA上实现了高速FIR滤波器。该滤波器工程经ISE12.3综合、布局布线后,利用Modelsim SE 6.5和Matlab联合仿真。仿真结果表明,该设计可以提高滤波器处理速度,32阶的滤波器最高时钟频率可达到399.624MHz。对滤波器进行进一步优化,节约了硬件资源占用。展开更多
Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reduc...Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reducing the hardware amount and in enhancing the speed performance. Results and Conclusion\ VHDL simulation, synthesis and layout design of system are implemented. This 2 D IDCT ASIC design owns best timing performance when compared with other better designs internationally. Results of design prove to be excellent.展开更多
基金This article was supported by the general project“Research on Wind and Photovoltaic Fault Characteristics and Practical Short Circuit Calculation Model”(521820200097)of Jiangxi Electric Power Company.
文摘During faults in a distribution network,the output power of a distributed generation(DG)may be uncertain.Moreover,the output currents of distributed power sources are also affected by the output power,resulting in uncertainties in the calculation of the short-circuit current at the time of a fault.Additionally,the impacts of such uncertainties around short-circuit currents will increase with the increase of distributed power sources.Thus,it is very important to develop a method for calculating the short-circuit current while considering the uncertainties in a distribution network.In this study,an affine arithmetic algorithm for calculating short-circuit current intervals in distribution networks with distributed power sources while considering power fluctuations is presented.The proposed algorithm includes two stages.In the first stage,normal operations are considered to establish a conservative interval affine optimization model of injection currents in distributed power sources.Constrained by the fluctuation range of distributed generation power at the moment of fault occurrence,the model can then be used to solve for the fluctuation range of injected current amplitudes in distributed power sources.The second stage is implemented after a malfunction occurs.In this stage,an affine optimization model is first established.This model is developed to characterizes the short-circuit current interval of a transmission line,and is constrained by the fluctuation range of the injected current amplitude of DG during normal operations.Finally,the range of the short-circuit current amplitudes of distribution network lines after a short-circuit fault occurs is predicted.The algorithm proposed in this article obtains an interval range containing accurate results through interval operation.Compared with traditional point value calculation methods,interval calculation methods can provide more reliable analysis and calculation results.The range of short-circuit current amplitude obtained by this algorithm is slightly larger than those obtained using the Monte Carlo algorithm and the Latin hypercube sampling algorithm.Therefore,the proposed algorithm has good suitability and does not require iterative calculations,resulting in a significant improvement in computational speed compared to the Monte Carlo algorithm and the Latin hypercube sampling algorithm.Furthermore,the proposed algorithm can provide more reliable analysis and calculation results,improving the safety and stability of power systems.
文摘针对目前利用FPGA实现基于分布式算法(DA)FIR滤波器的不足,以及为了实现高速FIR滤波器,提出了一种位并行分布式算法结构的解决方案。采用位并行分布式算法和流水线式并行加法器树,在Xilinx Virtex5系列FPGA上实现了高速FIR滤波器。该滤波器工程经ISE12.3综合、布局布线后,利用Modelsim SE 6.5和Matlab联合仿真。仿真结果表明,该设计可以提高滤波器处理速度,32阶的滤波器最高时钟频率可达到399.624MHz。对滤波器进行进一步优化,节约了硬件资源占用。
文摘Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reducing the hardware amount and in enhancing the speed performance. Results and Conclusion\ VHDL simulation, synthesis and layout design of system are implemented. This 2 D IDCT ASIC design owns best timing performance when compared with other better designs internationally. Results of design prove to be excellent.