目的:对数字X线摄影(D R)设备主要性能参数检测进行初步研究。方法:根据设备的性能参数和特点,参考厂家说明和国外文献,对两台DR设备(柯达公司的DirectV iew DR9000系统,GE公司的RevolutionTM X R d/-XQ i/系统)的主要性能参数进行了质...目的:对数字X线摄影(D R)设备主要性能参数检测进行初步研究。方法:根据设备的性能参数和特点,参考厂家说明和国外文献,对两台DR设备(柯达公司的DirectV iew DR9000系统,GE公司的RevolutionTM X R d/-XQ i/系统)的主要性能参数进行了质量检测。结果:所测性能参数的结果都在厂家提供的最大允许误差值范围内,表明这些设备可以正常工作,所获得的图像质量可以满足临床诊断的要求。结论:D R设备性能参数的检测是保证设备正常使用的有效措施,也是获取高质量影像的必要手段。展开更多
Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or ...Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.展开更多
文摘目的:对数字X线摄影(D R)设备主要性能参数检测进行初步研究。方法:根据设备的性能参数和特点,参考厂家说明和国外文献,对两台DR设备(柯达公司的DirectV iew DR9000系统,GE公司的RevolutionTM X R d/-XQ i/系统)的主要性能参数进行了质量检测。结果:所测性能参数的结果都在厂家提供的最大允许误差值范围内,表明这些设备可以正常工作,所获得的图像质量可以满足临床诊断的要求。结论:D R设备性能参数的检测是保证设备正常使用的有效措施,也是获取高质量影像的必要手段。
文摘Dynamically reconfigurable Field Programmable Gate Array(dr-FPGA) based electronic systems on board mission-critical systems are highly susceptible to radiation induced hazards that may lead to faults in the logic or in the configuration memory. The aim of our research is to characterize self-test and repair processes in Fault Tolerant(FT) dr-FPGA systems in the presence of environmental faults and explore their interrelationships. We develop a Continuous Time Markov Chain(CTMC) model that captures the high level fail-repair processes on a dr-FPGA with periodic online Built-In Self-Test(BIST) and scrubbing to detect and repair faults with minimum latency. Simulation results reveal that given an average fault interval of 36 s, an optimum self-test interval of 48.3 s drives the system to spend 13% of its time in self-tests, remain in safe working states for 76% of its time and face risky fault-prone states for only 7% of its time. Further, we demonstrate that a well-tuned repair strategy boosts overall system availability, minimizes the occurrence of unsafe states, and accommodates a larger range of fault rates within which the system availability remains stable within 10% of its maximum level.
