The design principle for a multi-wire proportional chamber with a cathode strip and delay-line readout is described. A prototype chamber of a size of 10 cm×10 cm was made together with the readout electronics cir...The design principle for a multi-wire proportional chamber with a cathode strip and delay-line readout is described. A prototype chamber of a size of 10 cm×10 cm was made together with the readout electronics circuit. A very clean signal with very low background noise was obtained by applying a transformer between the delay-line and the pre-amplifier in order to match the resistance. Along the anode wire direction a position resolution of less than 0.5 mm was achieved with a ^55Fe-5.9 keV X ray source. The simple structure, large effective area and high position resolution allow the application of a gas chamber of this kind to many purposes.展开更多
An X-ray imaging device based on a triple-GEM (Gas Electron Multiplier) detector, a fast delay-line circuit with 700 MHz cut-off frequency and two dimensional readout strips with 150 μm width on the top and 250 μm...An X-ray imaging device based on a triple-GEM (Gas Electron Multiplier) detector, a fast delay-line circuit with 700 MHz cut-off frequency and two dimensional readout strips with 150 μm width on the top and 250 μm width on the bottom, is designed and tested. The localization information is derived from the propagation time of the induced signals on the readout strips. This device has a good spatial resolution of 150 μm and works stably at an intensity of 105 Hz/mm2 with 8 keV X-rays.展开更多
The single-shot readout data process is essential for the realization of high-fidelity qubits and fault-tolerant quantum algorithms in semiconductor quantum dots. However, the fidelity and visibility of the readout pr...The single-shot readout data process is essential for the realization of high-fidelity qubits and fault-tolerant quantum algorithms in semiconductor quantum dots. However, the fidelity and visibility of the readout process are sensitive to the choice of the thresholds and limited by the experimental hardware. By demonstrating the linear dependence between the measured spin state probabilities and readout visibilities along with dark counts, we describe an alternative threshold-independent method for the single-shot readout of spin qubits in semiconductor quantum dots. We can obtain the extrapolated spin state probabilities of the prepared probabilities of the excited spin state through the threshold-independent method. We then analyze the corresponding errors of the method, finding that errors of the extrapolated probabilities cannot be neglected with no constraints on the readout time and threshold voltage. Therefore, by limiting the readout time and threshold voltage, we ensure the accuracy of the extrapolated probability. We then prove that the efficiency and robustness of this method are 60 times larger than those of the most commonly used method. Moreover, we discuss the influence of the electron temperature on the effective area with a fixed external magnetic field and provide a preliminary demonstration for a single-shot readout of up to 0.7K/1.5T in the future.展开更多
The high energy cosmic-radiation detection(HERD)facility is planned to launch in 2027 and scheduled to be installed on the China Space Station.It serves as a dark matter particle detector,a cosmic ray instrument,and a...The high energy cosmic-radiation detection(HERD)facility is planned to launch in 2027 and scheduled to be installed on the China Space Station.It serves as a dark matter particle detector,a cosmic ray instrument,and an observatory for high-energy gamma rays.A transition radiation detector placed on one of its lateral sides serves dual purpose,(ⅰ)calibrating HERD's electromagnetic calorimeter in the TeV energy range,and(ⅱ)serving as an independent detector for high-energy gamma rays.In this paper,the prototype readout electronics design of the transition radiation detector is demonstrated,which aims to accurately measure the charge of the anodes using the SAMPA application specific integrated circuit chip.The electronic performance of the prototype system is evaluated in terms of noise,linearity,and resolution.Through the presented design,each electronic channel can achieve a dynamic range of 0–100 fC,the RMS noise level not exceeding 0.15 fC,and the integral nonlinearity was<0.2%.To further verify the readout electronic performance,a joint test with the detector was carried out,and the results show that the prototype system can satisfy the requirements of the detector's scientific goals.展开更多
The High-energy Fragment Separator(HFRS),which is currently under construction,is a leading international radioactive beam device.Multiple sets of position-sensitive twin time projection chamber(TPC)detectors are dist...The High-energy Fragment Separator(HFRS),which is currently under construction,is a leading international radioactive beam device.Multiple sets of position-sensitive twin time projection chamber(TPC)detectors are distributed on HFRS for particle identification and beam monitoring.The twin TPCs'readout electronics system operates in a trigger-less mode due to its high counting rate,leading to a challenge of handling large amounts of data.To address this problem,we introduced an event-building algorithm.This algorithm employs a hierarchical processing strategy to compress data during transmission and aggregation.In addition,it reconstructs twin TPCs'events online and stores only the reconstructed particle information,which significantly reduces the burden on data transmission and storage resources.Simulation studies demonstrated that the algorithm accurately matches twin TPCs'events and reduces more than 98%of the data volume at a counting rate of 500 kHz/channel.展开更多
Readout errors caused by measurement noise are a significant source of errors in quantum circuits,which severely affect the output results and are an urgent problem to be solved in noisy-intermediate scale quantum(NIS...Readout errors caused by measurement noise are a significant source of errors in quantum circuits,which severely affect the output results and are an urgent problem to be solved in noisy-intermediate scale quantum(NISQ)computing.In this paper,we use the bit-flip averaging(BFA)method to mitigate frequent readout errors in quantum generative adversarial networks(QGAN)for image generation,which simplifies the response matrix structure by averaging the qubits for each random bit-flip in advance,successfully solving problems with high cost of measurement for traditional error mitigation methods.Our experiments were simulated in Qiskit using the handwritten digit image recognition dataset under the BFA-based method,the Kullback-Leibler(KL)divergence of the generated images converges to 0.04,0.05,and 0.1 for readout error probabilities of p=0.01,p=0.05,and p=0.1,respectively.Additionally,by evaluating the fidelity of the quantum states representing the images,we observe average fidelity values of 0.97,0.96,and 0.95 for the three readout error probabilities,respectively.These results demonstrate the robustness of the model in mitigating readout errors and provide a highly fault tolerant mechanism for image generation models.展开更多
In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-ene...In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-energy imaging calorimeter(HEIC) is currently being developed as a homogeneous calorimeter that utilizes long bismuth germanate(BGO) scintillation crystals as both absorbers and detectors. To accurately measure the energy deposition in the BGO bar of HEIC, a highdynamic-range readout method using a silicon photomultiplier(SiPM) and multiphotodiode(PD) with different active areas has been proposed. A prototype readout system that adopts multichannel charge measurement ASICs was also developed to read out the combined system of SiPMs and PDs. Preliminary tests confirmed the feasibility of the readout scheme, which is expected to have a dynamic range close to 10~6.展开更多
With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware ...With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware deployment platforms,Field Programmable Gate Array(FPGA)has the advantages of being programmable,low power consumption,parallelism,and low cost.However,the enormous amount of calculation of DCNN and the limited logic capacity of FPGA restrict the energy efficiency of the DCNN accelerator.The traditional sequential sliding window method can improve the throughput of the DCNN accelerator by data multiplexing,but this method’s data multiplexing rate is low because it repeatedly reads the data between rows.This paper proposes a fast data readout strategy via the circular sliding window data reading method,it can improve the multiplexing rate of data between rows by optimizing the memory access order of input data.In addition,the multiplication bit width of the DCNN accelerator is much smaller than that of the Digital Signal Processing(DSP)on the FPGA,which means that there will be a waste of resources if a multiplication uses a single DSP.A multiplier sharing strategy is proposed,the multiplier of the accelerator is customized so that a single DSP block can complete multiple groups of 4,6,and 8-bit signed multiplication in parallel.Finally,based on two strategies of appeal,an FPGA optimized accelerator is proposed.The accelerator is customized by Verilog language and deployed on Xilinx VCU118.When the accelerator recognizes the CIRFAR-10 dataset,its energy efficiency is 39.98 GOPS/W,which provides 1.73×speedup energy efficiency over previous DCNN FPGA accelerators.When the accelerator recognizes the IMAGENET dataset,its energy efficiency is 41.12 GOPS/W,which shows 1.28×−3.14×energy efficiency compared with others.展开更多
“A Craftsman Must Sharpen His Tools to Do His Job,”said Confucius.Nuclear detection and readout techniques are the foundation of particle physics,nuclear physics,and particle astrophysics to reveal the nature of the...“A Craftsman Must Sharpen His Tools to Do His Job,”said Confucius.Nuclear detection and readout techniques are the foundation of particle physics,nuclear physics,and particle astrophysics to reveal the nature of the universe.Also,they are being increasingly used in other disciplines like nuclear power generation,life sciences,environmental sciences,medical sciences,etc.The article reviews the short history,recent development,and trend of nuclear detection and readout techniques,covering Semiconductor Detector,Gaseous Detector,Scintillation Detector,Cherenkov Detector,Transition Radiation Detector,and Readout Techniques.By explaining the principle and using examples,we hope to help the interested reader underst and this research field and bring exciting information to the community.展开更多
This paper investigates the untraditional approach of contention resolution in Wavelength Division Multiplexing (WDM) Optical Packet Switching (OPS). The most striking characteristics of the developed switch architect...This paper investigates the untraditional approach of contention resolution in Wavelength Division Multiplexing (WDM) Optical Packet Switching (OPS). The most striking characteristics of the developed switch architecture are: (1) Contention resolution is achieved by a combined sharing of Fiber Delay-Lines (FDLs) and Tunable Optical Wavelength Converters (TOWCs); (2) FDLs are arranged in non-degenerate form, i.e., non-uniform distribution of the delay lines; (3) TOWCs just can perform wavelength conversion in partial continuous wavelength channels, i.e., sparse wavelength conversion. The concrete configurations of FDLs and TOWCs are described and analyzed under non-bursty and bursty traffic scenarios. Simulation results demonstrate that for a prefixed packet loss probability constraint, e.g., 10-6, the developed architecture provides a different point of view in OPS design. That is, combined sharing of FDLs and TOWCs can, effectively, obtain a good tradeoff between the switch size and the cost, and TOWCs which are achieved in sparse form can also decrease the implementing complexity.展开更多
A major concern in modern smart-phones and hand-held devices is a way of mitigating the time interval error (TIE) perceived at high-speed digital transits along the traces of the circuit-board (rigid and or flexible) ...A major concern in modern smart-phones and hand-held devices is a way of mitigating the time interval error (TIE) perceived at high-speed digital transits along the traces of the circuit-board (rigid and or flexible) used in baseband infrastructures. Indicated here is a way of adopting a planar fractal inductor configuration to improvise the necessary time-delay in the transits of digital signal phase jitter and reduce the TIE. This paper addresses systematic design considerations on fractal inductor geometry commensurate with practical aspects of its implementation as delaylines in the high-speed digital transports at the baseband operations of smart-phone infrastructures. Experimental results obtained from a test module are presented to illustrate the efficacy of the design and acceptable delay performance of the test structure commensurate with the digital transports of interest.展开更多
An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator re...An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB.展开更多
HFRS(HIAF FRagment Separator) will be the radioactive secondary beam separation line on High-Intensity heavy-ion Accelerator Facility(HIAF) in China. Several TPC detectors, with high count rates, are planned for parti...HFRS(HIAF FRagment Separator) will be the radioactive secondary beam separation line on High-Intensity heavy-ion Accelerator Facility(HIAF) in China. Several TPC detectors, with high count rates, are planned for particle identification and beam monitoring at HFRS. This paper presents an event-driven internal memory and synchronous readout(EDIMS)prototype ASIC chip. The aim is to provide HFRS-TPC with high-precision time and charge measurements with high count rates and a large dynamic range. The first prototype EDIMS chip integrated 16 channels and is fabricated using a 0.18-μm CMOS process. Each channel consists of a charge-sensitive amplifier, fast shaper, slow shaper, peak detect-and-hold circuit, discriminator with time-walk compensation, analog memory, and FIFO. The token ring is used for clock-synchronous readout. The chip is taped and tested.展开更多
Novel schemes for a charge sensitive amplifier (CSA) and a CR-(RC), semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as ...Novel schemes for a charge sensitive amplifier (CSA) and a CR-(RC), semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge(ENC) is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-(RC),semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.展开更多
基金Major State Basic Research Development Program of China (2007CB815002)NSFC (10775003, 10827505)
文摘The design principle for a multi-wire proportional chamber with a cathode strip and delay-line readout is described. A prototype chamber of a size of 10 cm×10 cm was made together with the readout electronics circuit. A very clean signal with very low background noise was obtained by applying a transformer between the delay-line and the pre-amplifier in order to match the resistance. Along the anode wire direction a position resolution of less than 0.5 mm was achieved with a ^55Fe-5.9 keV X ray source. The simple structure, large effective area and high position resolution allow the application of a gas chamber of this kind to many purposes.
基金Supported by National Natural Science Foundation of China (10575101)
文摘An X-ray imaging device based on a triple-GEM (Gas Electron Multiplier) detector, a fast delay-line circuit with 700 MHz cut-off frequency and two dimensional readout strips with 150 μm width on the top and 250 μm width on the bottom, is designed and tested. The localization information is derived from the propagation time of the induced signals on the readout strips. This device has a good spatial resolution of 150 μm and works stably at an intensity of 105 Hz/mm2 with 8 keV X-rays.
基金Project supported by the National Natural Science Foundation of China (Grant Nos.12074368,92165207,12034018,and 62004185)the Anhui Province Natural Science Foundation (Grant No.2108085J03)the USTC Tang Scholarship。
文摘The single-shot readout data process is essential for the realization of high-fidelity qubits and fault-tolerant quantum algorithms in semiconductor quantum dots. However, the fidelity and visibility of the readout process are sensitive to the choice of the thresholds and limited by the experimental hardware. By demonstrating the linear dependence between the measured spin state probabilities and readout visibilities along with dark counts, we describe an alternative threshold-independent method for the single-shot readout of spin qubits in semiconductor quantum dots. We can obtain the extrapolated spin state probabilities of the prepared probabilities of the excited spin state through the threshold-independent method. We then analyze the corresponding errors of the method, finding that errors of the extrapolated probabilities cannot be neglected with no constraints on the readout time and threshold voltage. Therefore, by limiting the readout time and threshold voltage, we ensure the accuracy of the extrapolated probability. We then prove that the efficiency and robustness of this method are 60 times larger than those of the most commonly used method. Moreover, we discuss the influence of the electron temperature on the effective area with a fixed external magnetic field and provide a preliminary demonstration for a single-shot readout of up to 0.7K/1.5T in the future.
基金supported by the National Natural Science Foundation of China(Nos.12375193,11975292,11875304)the CAS“Light of West China”Program+1 种基金the Scientific Instrument Developing Project of the Chinese Academy of Sciences(No.GJJSTD20210009)the CAS Pioneer Hundred Talent Program。
文摘The high energy cosmic-radiation detection(HERD)facility is planned to launch in 2027 and scheduled to be installed on the China Space Station.It serves as a dark matter particle detector,a cosmic ray instrument,and an observatory for high-energy gamma rays.A transition radiation detector placed on one of its lateral sides serves dual purpose,(ⅰ)calibrating HERD's electromagnetic calorimeter in the TeV energy range,and(ⅱ)serving as an independent detector for high-energy gamma rays.In this paper,the prototype readout electronics design of the transition radiation detector is demonstrated,which aims to accurately measure the charge of the anodes using the SAMPA application specific integrated circuit chip.The electronic performance of the prototype system is evaluated in terms of noise,linearity,and resolution.Through the presented design,each electronic channel can achieve a dynamic range of 0–100 fC,the RMS noise level not exceeding 0.15 fC,and the integral nonlinearity was<0.2%.To further verify the readout electronic performance,a joint test with the detector was carried out,and the results show that the prototype system can satisfy the requirements of the detector's scientific goals.
基金partially supported by the Strategic Priority Research Program of Chinese Academy of Science(No.XDB 34030000)the National Natural Science Foundation of China(Nos.11975293 and 12205348)。
文摘The High-energy Fragment Separator(HFRS),which is currently under construction,is a leading international radioactive beam device.Multiple sets of position-sensitive twin time projection chamber(TPC)detectors are distributed on HFRS for particle identification and beam monitoring.The twin TPCs'readout electronics system operates in a trigger-less mode due to its high counting rate,leading to a challenge of handling large amounts of data.To address this problem,we introduced an event-building algorithm.This algorithm employs a hierarchical processing strategy to compress data during transmission and aggregation.In addition,it reconstructs twin TPCs'events online and stores only the reconstructed particle information,which significantly reduces the burden on data transmission and storage resources.Simulation studies demonstrated that the algorithm accurately matches twin TPCs'events and reduces more than 98%of the data volume at a counting rate of 500 kHz/channel.
基金Project supported by the Natural Science Foundation of Shandong Province,China (Grant No.ZR2021MF049)Joint Fund of Natural Science Foundation of Shandong Province (Grant Nos.ZR2022LLZ012 and ZR2021LLZ001)。
文摘Readout errors caused by measurement noise are a significant source of errors in quantum circuits,which severely affect the output results and are an urgent problem to be solved in noisy-intermediate scale quantum(NISQ)computing.In this paper,we use the bit-flip averaging(BFA)method to mitigate frequent readout errors in quantum generative adversarial networks(QGAN)for image generation,which simplifies the response matrix structure by averaging the qubits for each random bit-flip in advance,successfully solving problems with high cost of measurement for traditional error mitigation methods.Our experiments were simulated in Qiskit using the handwritten digit image recognition dataset under the BFA-based method,the Kullback-Leibler(KL)divergence of the generated images converges to 0.04,0.05,and 0.1 for readout error probabilities of p=0.01,p=0.05,and p=0.1,respectively.Additionally,by evaluating the fidelity of the quantum states representing the images,we observe average fidelity values of 0.97,0.96,and 0.95 for the three readout error probabilities,respectively.These results demonstrate the robustness of the model in mitigating readout errors and provide a highly fault tolerant mechanism for image generation models.
基金Foundation of China (Nos. 12227805, U1831206, 12103095, 12235012, 12273120, and 11973097)the Scientific Instrument Developing Project of the Chinese Academy of Sciences (No. GJJSTD20210009)。
文摘In the future, the Very Large Area gamma-ray Space Telescope is expected to observe high-energy electrons and gamma rays in the MeV to TeV range with unprecedented acceptance. As part of the detector suite, a high-energy imaging calorimeter(HEIC) is currently being developed as a homogeneous calorimeter that utilizes long bismuth germanate(BGO) scintillation crystals as both absorbers and detectors. To accurately measure the energy deposition in the BGO bar of HEIC, a highdynamic-range readout method using a silicon photomultiplier(SiPM) and multiphotodiode(PD) with different active areas has been proposed. A prototype readout system that adopts multichannel charge measurement ASICs was also developed to read out the combined system of SiPMs and PDs. Preliminary tests confirmed the feasibility of the readout scheme, which is expected to have a dynamic range close to 10~6.
基金supported in part by the Major Program of the Ministry of Science and Technology of China under Grant 2019YFB2205102in part by the National Natural Science Foundation of China under Grant 61974164,62074166,61804181,62004219,62004220,62104256.
文摘With the continuous development of deep learning,Deep Convolutional Neural Network(DCNN)has attracted wide attention in the industry due to its high accuracy in image classification.Compared with other DCNN hard-ware deployment platforms,Field Programmable Gate Array(FPGA)has the advantages of being programmable,low power consumption,parallelism,and low cost.However,the enormous amount of calculation of DCNN and the limited logic capacity of FPGA restrict the energy efficiency of the DCNN accelerator.The traditional sequential sliding window method can improve the throughput of the DCNN accelerator by data multiplexing,but this method’s data multiplexing rate is low because it repeatedly reads the data between rows.This paper proposes a fast data readout strategy via the circular sliding window data reading method,it can improve the multiplexing rate of data between rows by optimizing the memory access order of input data.In addition,the multiplication bit width of the DCNN accelerator is much smaller than that of the Digital Signal Processing(DSP)on the FPGA,which means that there will be a waste of resources if a multiplication uses a single DSP.A multiplier sharing strategy is proposed,the multiplier of the accelerator is customized so that a single DSP block can complete multiple groups of 4,6,and 8-bit signed multiplication in parallel.Finally,based on two strategies of appeal,an FPGA optimized accelerator is proposed.The accelerator is customized by Verilog language and deployed on Xilinx VCU118.When the accelerator recognizes the CIRFAR-10 dataset,its energy efficiency is 39.98 GOPS/W,which provides 1.73×speedup energy efficiency over previous DCNN FPGA accelerators.When the accelerator recognizes the IMAGENET dataset,its energy efficiency is 41.12 GOPS/W,which shows 1.28×−3.14×energy efficiency compared with others.
基金supported by the National Natural Science Foundation of China(No.12222512,U2032209,12075045,12335011,1875097,11975257,62074146,11975115,12205374,12305210,11975292,12005276,12005278,12375193,12227805,12235012,12375191,12005279)the National Key Research and Development Program of China(2021YFA1601300)+13 种基金the Strategic Priority Research Program of Chinese Academy of Sciences(XDB34000000)the CAS Pioneer Hundred Talent Programthe CAS“Light of West China”Programthe Natural Science Foundation of Liaoning Province(No.101300261)the Dalian Science and Technology Innovation Fund(2023JJ12GX013)the Special Projects of the Central Government in Guidance of Local Science and Technology Development(Research and development of three-dimensional prospecting technology based on Cosmic-ray muons)(YDZX20216200001297)the Science and Technology Planning Project of Gansu(20JR10RA645)the Lanzhou University Talent Cooperation Research Funds sponsored by both Lanzhou City(561121203)the Gansu provincial science and technology plan projects for talents(054000029)the Beijing Natural Science Foundation(No.1232033)the Beijing Hope Run Special Fund of Cancer Foundation of China(No.LC2021B23)the Guangdong Major Project of Basic and Applied Basic Research(No.2020B0301030008)the Scientific Instrument Developing Project of the Chinese Academy of Sciences(No.GJJSTD20210009)the Youth Innovation Promotion Association CAS(2021450)。
文摘“A Craftsman Must Sharpen His Tools to Do His Job,”said Confucius.Nuclear detection and readout techniques are the foundation of particle physics,nuclear physics,and particle astrophysics to reveal the nature of the universe.Also,they are being increasingly used in other disciplines like nuclear power generation,life sciences,environmental sciences,medical sciences,etc.The article reviews the short history,recent development,and trend of nuclear detection and readout techniques,covering Semiconductor Detector,Gaseous Detector,Scintillation Detector,Cherenkov Detector,Transition Radiation Detector,and Readout Techniques.By explaining the principle and using examples,we hope to help the interested reader underst and this research field and bring exciting information to the community.
基金Supported by the National Natural Science Foundation of China (No.69990540).
文摘This paper investigates the untraditional approach of contention resolution in Wavelength Division Multiplexing (WDM) Optical Packet Switching (OPS). The most striking characteristics of the developed switch architecture are: (1) Contention resolution is achieved by a combined sharing of Fiber Delay-Lines (FDLs) and Tunable Optical Wavelength Converters (TOWCs); (2) FDLs are arranged in non-degenerate form, i.e., non-uniform distribution of the delay lines; (3) TOWCs just can perform wavelength conversion in partial continuous wavelength channels, i.e., sparse wavelength conversion. The concrete configurations of FDLs and TOWCs are described and analyzed under non-bursty and bursty traffic scenarios. Simulation results demonstrate that for a prefixed packet loss probability constraint, e.g., 10-6, the developed architecture provides a different point of view in OPS design. That is, combined sharing of FDLs and TOWCs can, effectively, obtain a good tradeoff between the switch size and the cost, and TOWCs which are achieved in sparse form can also decrease the implementing complexity.
文摘A major concern in modern smart-phones and hand-held devices is a way of mitigating the time interval error (TIE) perceived at high-speed digital transits along the traces of the circuit-board (rigid and or flexible) used in baseband infrastructures. Indicated here is a way of adopting a planar fractal inductor configuration to improvise the necessary time-delay in the transits of digital signal phase jitter and reduce the TIE. This paper addresses systematic design considerations on fractal inductor geometry commensurate with practical aspects of its implementation as delaylines in the high-speed digital transports at the baseband operations of smart-phone infrastructures. Experimental results obtained from a test module are presented to illustrate the efficacy of the design and acceptable delay performance of the test structure commensurate with the digital transports of interest.
文摘An innovative solution to design phase and quadrature pulsed coupled oscillators systems through electromagnetic waveguides is described in this paper. Each oscillator is constituted by an LC differential resonator refilled through a couple of current pulse generator circuits. The phase and quadrature coupling between the two differential oscillators is achieved using delayed replicas of generated fundamentals from a resonator as driving signal of pulse generator injecting in the other resonator. The delayed replicas are obtained by microstrip-based delay-lines. A 2.4 - 2.5 GHz VCO has been implemented in a 150 nm RF CMOS process. Simulations showed at 1 MHz offset a phase noise of -139.9 dBc/Hz and a FOM of -189.1 dB.
基金supported by the National Natural Science Foundation of China (Nos. 11975293 and 12105338)the Strategic Priority Research Program of Chinese Academy of Science (Nos. XDB 34040200 and XPB 23)the Technology Innovation Project of Instrument and Equipment Function Development of Chinese Academy of Sciences (No. 2023g102)。
文摘HFRS(HIAF FRagment Separator) will be the radioactive secondary beam separation line on High-Intensity heavy-ion Accelerator Facility(HIAF) in China. Several TPC detectors, with high count rates, are planned for particle identification and beam monitoring at HFRS. This paper presents an event-driven internal memory and synchronous readout(EDIMS)prototype ASIC chip. The aim is to provide HFRS-TPC with high-precision time and charge measurements with high count rates and a large dynamic range. The first prototype EDIMS chip integrated 16 channels and is fabricated using a 0.18-μm CMOS process. Each channel consists of a charge-sensitive amplifier, fast shaper, slow shaper, peak detect-and-hold circuit, discriminator with time-walk compensation, analog memory, and FIFO. The token ring is used for clock-synchronous readout. The chip is taped and tested.
文摘Novel schemes for a charge sensitive amplifier (CSA) and a CR-(RC), semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge(ENC) is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-(RC),semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.