An efficient way to design a down-converter assembly for the Ka-band millimeter system is presented, in which dielectric resonators (DR's) are adopted in the Schottky barrier diode image recovery mixer and the loca...An efficient way to design a down-converter assembly for the Ka-band millimeter system is presented, in which dielectric resonators (DR's) are adopted in the Schottky barrier diode image recovery mixer and the local oscillator (LO). DR structures guarantee high frequency stability with an acceptable volume. The configurations of low noise amplifier, mixer and oscillator in the assembly are described and fabricated to estimate the chain performance. According to the verification results, the assembly exhibits the noise figure of less than 5 dB over 1 GHz frequency range, and the single-sideband phase noise (200 kHz offset from carrier frequency) of - 70 dBc/Hz. Utilizing the DR structure, the frequency stability of the local oscillator is less than 60 × 10^-6/℃.展开更多
A high-reliability broadband high-linearity down-converter for multi-antenna global navigation satellite system(GNSS)receiver is presented in this paper.Based on direction-of-arrival estimation,the multi-antenna GNSS ...A high-reliability broadband high-linearity down-converter for multi-antenna global navigation satellite system(GNSS)receiver is presented in this paper.Based on direction-of-arrival estimation,the multi-antenna GNSS receiver can separate the GNSS signals from the interfering signals and suppress harmful broadband radio frequency interferences.To drive the off-chip 50Ω2 resistive load and meet the stringent requirements of linearity,a quad-channel down-converter with a broadband common-gate low-noise transcon-ductance amplifier,current-driven passive mixer and novel bridge mode transimpedance driving amplifier have been proposed to contruct the multi-antenna recelver.The operating frequency of this down-converter is from 1.15 to 1.65 GHz,covering all bands for global positioning system(GPS),Beidou navigation satellite system(BDS),global navigation satellite system(GLONASS)and Galileo.The measured results show that the proposed quad-channel down-converter achieves+38 dBm output 3rd order intercept point(OIP3)and+17 dBm OP1dB(output-referred 1 dB compression point),9.5 dB to 12.9 dB noise figure(NF)across the variable gain of 10 dB to 27 dB and approximately 47 dB channel isolation.展开更多
Digital receivers have become more and more popular in radar, communication, and electric warfare for the advantages compared with their analog counterparts. But conventional digital receivers have been generally cons...Digital receivers have become more and more popular in radar, communication, and electric warfare for the advantages compared with their analog counterparts. But conventional digital receivers have been generally considered impractical for bandwidth greater than several hundreds MHz. To extend receiver bandwidth, decrease data rate and save hardware resources, three novel structures are proposed. They decimate the data stream prior to mixing and filtering, then process the multiple decimated streams in parallel at a lower rate. Consequently it is feasible to realize wideband receivers on the current ASIC devices. A design example and corresponding simulation results are demonstrated to evaluate the proposed structures.展开更多
The Paper introduces an IF software radio receiver development Platform based on high-speed monolithic A/D Converter AD6640, Progranunable Digital Down-converter AD6620 and high-speed DSP chip TMSC320C6701. The implem...The Paper introduces an IF software radio receiver development Platform based on high-speed monolithic A/D Converter AD6640, Progranunable Digital Down-converter AD6620 and high-speed DSP chip TMSC320C6701. The implementation method is described as well as AD6620 parameter setting analysis. It also presents a flow chart of the on-line programming with the help of PC. The algorithm for demodulation AM signal is discussed.展开更多
The goal of this work is aimed to improve the power conversion efficiency of single crystalline silicon-based photovoltaic (PV) cells by using the solar spectral conversion principle, which employed a down-convertin...The goal of this work is aimed to improve the power conversion efficiency of single crystalline silicon-based photovoltaic (PV) cells by using the solar spectral conversion principle, which employed a down-converting phosphor to convert a high-energy ultraviolet photon to the less energetic red-emitting photons to improve the spectral response of Si solar cells. In this study, the surface of silicon solar cells was coated with a red-emitting KCaGd(PO4)2:Eu3+ phosphor by using the screen-printing technique. In addition to the investigation on the microstructure using scanning electron microscopy (SEM), we measured the short circuit current (Isc), open circuit voltage (Voc), and power conversion efficiency (η) of spectral-conversion cells and compared with those of bare solar cells as a reference. Preliminary experimental results revealed that in an optimized PV cell, an enhancement of (0.64+0.01)% (from 16.03% to 16.67%) in Δη of a Si-based PV cell was achieved.展开更多
文摘An efficient way to design a down-converter assembly for the Ka-band millimeter system is presented, in which dielectric resonators (DR's) are adopted in the Schottky barrier diode image recovery mixer and the local oscillator (LO). DR structures guarantee high frequency stability with an acceptable volume. The configurations of low noise amplifier, mixer and oscillator in the assembly are described and fabricated to estimate the chain performance. According to the verification results, the assembly exhibits the noise figure of less than 5 dB over 1 GHz frequency range, and the single-sideband phase noise (200 kHz offset from carrier frequency) of - 70 dBc/Hz. Utilizing the DR structure, the frequency stability of the local oscillator is less than 60 × 10^-6/℃.
基金supported by the Key-area Research and Development Program,Guangdong Province of China(Grants No.2019B010141002 and 2020B0404030005).
文摘A high-reliability broadband high-linearity down-converter for multi-antenna global navigation satellite system(GNSS)receiver is presented in this paper.Based on direction-of-arrival estimation,the multi-antenna GNSS receiver can separate the GNSS signals from the interfering signals and suppress harmful broadband radio frequency interferences.To drive the off-chip 50Ω2 resistive load and meet the stringent requirements of linearity,a quad-channel down-converter with a broadband common-gate low-noise transcon-ductance amplifier,current-driven passive mixer and novel bridge mode transimpedance driving amplifier have been proposed to contruct the multi-antenna recelver.The operating frequency of this down-converter is from 1.15 to 1.65 GHz,covering all bands for global positioning system(GPS),Beidou navigation satellite system(BDS),global navigation satellite system(GLONASS)and Galileo.The measured results show that the proposed quad-channel down-converter achieves+38 dBm output 3rd order intercept point(OIP3)and+17 dBm OP1dB(output-referred 1 dB compression point),9.5 dB to 12.9 dB noise figure(NF)across the variable gain of 10 dB to 27 dB and approximately 47 dB channel isolation.
基金This project was supported by the National Defense I mportant Research Foundation of China(03413070506)
文摘Digital receivers have become more and more popular in radar, communication, and electric warfare for the advantages compared with their analog counterparts. But conventional digital receivers have been generally considered impractical for bandwidth greater than several hundreds MHz. To extend receiver bandwidth, decrease data rate and save hardware resources, three novel structures are proposed. They decimate the data stream prior to mixing and filtering, then process the multiple decimated streams in parallel at a lower rate. Consequently it is feasible to realize wideband receivers on the current ASIC devices. A design example and corresponding simulation results are demonstrated to evaluate the proposed structures.
文摘The Paper introduces an IF software radio receiver development Platform based on high-speed monolithic A/D Converter AD6640, Progranunable Digital Down-converter AD6620 and high-speed DSP chip TMSC320C6701. The implementation method is described as well as AD6620 parameter setting analysis. It also presents a flow chart of the on-line programming with the help of PC. The algorithm for demodulation AM signal is discussed.
基金Project supported by National Science Council of Taiwan (NSC98-2113-M-009-005-MY3)
文摘The goal of this work is aimed to improve the power conversion efficiency of single crystalline silicon-based photovoltaic (PV) cells by using the solar spectral conversion principle, which employed a down-converting phosphor to convert a high-energy ultraviolet photon to the less energetic red-emitting photons to improve the spectral response of Si solar cells. In this study, the surface of silicon solar cells was coated with a red-emitting KCaGd(PO4)2:Eu3+ phosphor by using the screen-printing technique. In addition to the investigation on the microstructure using scanning electron microscopy (SEM), we measured the short circuit current (Isc), open circuit voltage (Voc), and power conversion efficiency (η) of spectral-conversion cells and compared with those of bare solar cells as a reference. Preliminary experimental results revealed that in an optimized PV cell, an enhancement of (0.64+0.01)% (from 16.03% to 16.67%) in Δη of a Si-based PV cell was achieved.