A CAD oriented quasi-analytical large-signal drain current model for 4H-SiC MESFETs

This paper reports that a 4H-SiC MESFET （Metal Semiconductor Field Effect Transistor） large signal drain current model based on physical expressions has been developed to be used in CAD tools. The form of drain current model is based on semi-empirical MESFET model, and all parameters in this model are determined by physical parameters of 4H-SiC MESFET. The verification of the present model embedded in CAD tools is made, which shows a good agreement with measured data of large signal DC I-V characteristics, PAE （power added efficiency）, output power and gain.

Temperature-Dependent Drain Current Characteristics and Low Frequency Noises in Indium Zinc Oxide Thin Fihn Transistors

The I-V characteristics and low frequency noises for indium zinc oxide thin film transistor are measured between 250 K and 430 K. The experimental results show that drain currents are thermally activated following the Meyer Neldel rule, which can be explained by the multiple-trapping process. Moreover, the field effect electron mobility firstly increases, and then decreases with the increase of temperature, while the threshold voltage decreases with increasing the temperature. The activation energy and the density of localized gap states are extracted. A noticeable increase in the density of localized states is observed at the higher temperatures.

Performance enhancement of CMOS terahertz detector by drain current

In this paper, we study the effect of the drain current on terahertz detection for Si metal-oxide semiconductor fieldeffect transistors（MOSFETs） both theoretically and experimentally. The analytical model, which is based on the smallsignal equivalent circuit of MOSFETs, predicts the significant improvement of the voltage responsivity Rv with the bias current. The experiment on antennas integrated with MOSFETs agrees with the analytical model, but the Rv improvement is accompanied first by a decrease, then an increase of the low-noise equivalent power（NEP） with the applied current. We determine the tradeoff between the low-NEP and high-Rv for the current-biased detectors. As the best-case scenario, we obtained an improvement of about six times in Rv without the cost of a higher NEP. We conclude that the current supply scheme can provide high-quality signal amplification in practical CMOS terahertz detection.

Anomalous Channel Length Dependence of Hot-Carrier-Induced Saturation Drain Current Degradation in n-Type MOSFETs

The dependencies of hot-carrier-induced degradations on the effective channel length Lch,eff are investigated for n-type metal-oxide-semiconductor field effect transistor （MOSFETs）. Our experiments find that, with decreasing Lch,eff, the saturation drain current （Iasat ） degradation is unexpectedly alleviated. The further study demonstrates that the anomalous Lch,eff dependence of Idsat degradation is induced by the increasing influence of the substrate current degradation on the lazar degradation with Lch,eff reducing.

Modulation of drain current as a function of energies substrate for InP HEMT devices

We present the drain current modulation for an HEMT using the TCAD SILVACO simulation tool with a drift–diffusion model at ambient temperature. The obtained results show that the decreases of substrate energies induce the decreasing of the obtained drain current similarly to the transconductance, which described the device due to increasing the transferred electrons concentration towards the substrate region, consequently to increase the molar fraction where the concentration of transferred electrons increases from 49 × 10;to 65 × 10;cm;when the molar fraction increases from 0.1 to 0.9. On the other hand, the decrease of molar fraction from 0.9 to 0.1 induces the increasing of drain current by 63%, where it increases from 1.1 mA/mm to 3 mA/mm at V;= 0.6 V and V;= 1 V. This fact leads to ensuring the possibility of using the obtained results of this work related to drain current for producing performances devices that brings together the AC characteristics of HEMT with a weak drain current, which is important in the bioengineering domain.

A physical surface-potential-based drain current model for polysilicon thin-film transistors

A physical drain current model of polysilicon thin-film transistors based on the charge-sheet model, the density of trap states and surface potential is proposed.The model uses non-iterative calculations,which are single-piece and valid in all operation regions above flat-band voltage.The distribution of the trap states,including both Gaussian deep-level states and exponential band-tail states,is also taken into account,and parameter extraction of trap state distribution is developed by the optoelectronic modulation spectroscopy measurement method. Comparisons with the available experimental data are accomplished,and good agreements are obtained.

Modeling the drain current and its equation parameters for lightly doped symmetrical double-gate MOSFETs

A 2D model for the potential distribution in silicon film is derived for a symmetrical double gate MOS- FET in weak inversion. This 2D potential distribution model is used to analytically derive an expression for the subthreshold slope and threshold voltage. A drain current model for lightly doped symmetrical DG MOSFETs is then presented by considering weak and strong inversion regions including short channel effects, series source to drain resistance and channel length modulation parameters. These derived models are compared with the simulation results of the SILVACO （Atlas） tool for different channel lengths and silicon film thicknesses. Lastly, the effect of the fixed oxide charge on the drain current model has been studied through simulation. It is observed that the obtained analytical models of syrnmetrical double gate MOSFETs are in good agreement with the simulated results for a channel length to silicon film thickness ratio greater than or equal to 2.

Explicit solution of channel potential and drain current model in symmetric double-gate polysilicon TFTs

A physical and explicit surface potential model for undoped symmetric double-gate polysilicon thinfilm transistors has been derived based on an effective charge density approach of Poisson＇s equation with both exponential deep and tail state terms included. The proposed surface potential calculation is single-piece and eliminatestheregionalapproach.Modelpredictionsarecomparedtonumericalsimulationswithcloseagreement,having absolute error in the millivolt range. Furthermore, expressions of the drain current are given for a wide range of operation regions, which have been justified by thorough comparisons with experimental data.

Improved power simulation of AlGaN/GaN HEMT at class-AB operation via an RF drain–source current correction method

A new modified Angelov current–voltage characteristic model equation is proposed to improve the drain–source current（Ids） simulation of an Al Ga N/Ga N-based（gallium nitride） high electron mobility transistor（Al Ga N/Ga N-based HEMT） at high power operation. Since an accurate radio frequency（RF） current simulation is critical for a correct power simulation of the device, in this paper we propose a method of Al Ga N/Ga N high electron mobility transistor（HEMT）nonlinear large-signal model extraction with a supplemental modeling of RF drain–source current as a function of RF input power. The improved results of simulated output power, gain, and power added efficiency（PAE） at class-AB quiescent bias of Vgs =-3.5 V, Vds= 30 V with a frequency of 9.6 GHz are presented.

AlN/β-Ga_(2)O_(3)HEMT直流特性仿真

本文利用器件仿真软件对AlN/β-Ga_(2)O_(3)高电子迁移率晶体管(HEMT)器件的直流特性进行研究。由于AlN具有很强的极化效应,在AlN/β-Ga_(2)O_(3)异质结界面处产生高浓度二维电子气(2DEG),使AlN/β-Ga_(2)O_(3)异质结基HEMT具有更加优越的器件性能。理论计算得到AlN/β-Ga_(2)O_(3)异质结界面处产生的面电荷密度为2.75×10^(13) cm^(-2)。通过分析器件的能带结构、沟道电子浓度分布,研究AlN势垒层厚度、栅极长度、栅漏间距,以及金属功函数等参数对器件转移特性和输出特性的影响。结果表明:随着AlN势垒层厚度的增大,阈值电压减小,最大跨导减小,沟道电子浓度增大使饱和漏电流增大;随着栅极长度缩短,跨导增大,当栅极长度缩短至0.1μm时,器件出现了短沟道效应,并且随着栅极长度的缩短,栅下沟道区电子浓度增大,而电子速度基本不变,导致饱和漏电流增大,导通电阻减小,并且器件的饱和特性变差;随着栅漏间距的增大,跨导增大,沟道区电子浓度不变,而电子速度略有增加,导致饱和漏电流增大;肖特基栅金属功函数的增加会增大阈值电压,不会改变器件跨导,沟道电子浓度减小导致饱和漏电流减小。上述结论为后面的器件的优化改进提供了理论依据。

考虑短路电流暂态分量的高压交流系统短路故障限流器参数设计

在高压交流输电系统(HVAC)发生短路故障时,极大可能会产生含暂态分量(short circuit current transient component,SCTC)的短路故障电流;当SCTC含量很大时甚至会产生短路电流的零点漂移现象,会对故障限流器(fault current limiter,FCL)的限流工作和参数设计造成很大的影响。针对上述问题,提出了一种SCTC泄能型故障限流器(SCTC energy drain type fault current limiter,SEDFCL)及其参数设计方法,可以加快SCTC的衰减。首先,分析了SEDFCL与SCTC的相互影响和SEDFCL的电磁路工作机理,并研究了SEDFCL场路耦合特性,对电磁参数进行了设计;然后,通过有限元仿真搭建了220 kV SEDFCL模型,探究了SEDFCL结构的有效性、合理性、RC参数的调节作用,以及故障情况下SEDFCL功能的有效性;最后,搭建一台小容量样机,建立试验平台并进行样机试验,证实SEDFCL结构和功能的有效性。与传统五柱式限流器(five-column hybrid excitation type FCL,FHETFCL)相比,SEDFCL将时间常数显著降低117.66%,限流效果提高6.29%。

Al_(2)O_(3)/HfO_(2)双钝化层微波氢终端金刚石MOSFET特性研究

微波氢终端金刚石器件低纵横比会导致较高的关态漏极泄漏电流,从而降低器件可靠性。文章首先提出一种金属-绝缘体-半导体电容模型揭示了漏极泄漏电流的抑制机理,然后利用高介电常数(High-K)顶部钝化层(Upper Passivation Layer,UPL)对漏极泄漏电流进行抑制,最后制备了40/100 nm Al_(2)O_(3)/HfO_(2)双钝化层氢终端金刚石金属-氧化物-半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)。实验结果表明,顶部钝化100 nm厚HfO_(2)后的氢终端金刚石MOSFET,在纵横比为7.5的情况下实现了约-3×10^(-7)mA/mm的漏极泄漏电流,射频特性测试表明其截止频率和最高振荡频率分别为6.1 GHz和11.1 GHz。以上结果表明,本文提出的Al_(2)O_(3)/HfO_(2)双钝化层氢终端金刚石MOSFET在高可靠和高频应用方面具有重要意义。

高原地区中医医院人才流失的原因与对策

人才流失是我国各地区、各行业普遍存在的问题,其中医疗行业人才流失是阻碍医院高质量发展的关键原因,高原地区医疗行业人才流失情况更为严峻。文章分析高原地区三甲中医医院人才流失情况,寻求改善人才流失情况的相关措施,降低高原地区高层次人才流失率。为强化医院管理制度落实,提升医院文化建设,加强人文关怀,提出解决人才流失问题的相应对策,为高原地区医院吸引人才、留住人才、用好人才等相关人才问题提供相应的理论借鉴。

温度对SiC MOSFET电流和电压变化率影响分析

由于SiC MOSFET的半导体物理和器件内部参数会随着温度的变化而发生变化,导致温度变化也会影响SiC MOSFET的动态特性。该文以其漏极电流变化率dID/dt、漏源极电压变化率dVDS/dt这2个动态性能参数为例,重点从实验的角度分析其随温度变化的规律。首先,搭建基于电感钳位双脉冲的SiC MOSFET动态特性测试电路,测试不同温度下漏极电流和漏源极电压,得到温度对其的影响规律;其次,基于器件物理方程建立SiC MOSFET漏极电流变化率dID/dt、漏源极电压变化率dVDS/dt的温度特性解析模型,且通过实验测试得到SiC MOSFET的阈值电压VTH、跨导gm的温度特性;最后,根据所建立的SiC MOSFET dID/dt、dVDS/dt温度特性解析模型及其VTH、gm的温度特性从理论上对实验所得结果进行定性解释。所得结果对SiC MOSFET器件选型、建立准确的器件模型及实际系统的设计具有指导意义。

一种高精度曲率补偿带隙基准电压源设计

根据带隙基准电压源的原理，基于CSMC0．5μm工艺设计了一种高精度二阶曲率补偿带隙基准电压源。利用MOS管工作在亚闽值区时漏电流和栅极电压的指数关系，在高温段对温度特性曲线进行补偿。通过Spectre仿真，得到输出基准电压为2．5V的电压基准源。工作电压范围为3.35～7．94V，1kHz时电源抑制比为-71．73dB，温度从-25～125℃之间变化时温度系数为7．003×10^-6℃^-1。

短沟道MOSFET解析物理模型

本文基于修正的二维泊松方程导出了适用于深亚微米MOSFET的阈值电压解析模型,并进而通过反型区电荷统一表达式并考虑到载流子速度饱和、DIBL、相关迁移率、反型层电容和沟道长度调制等主要小尺寸与高场效应,最后得到了较为准确、连续和可缩小的漏极电流模型.模型输出与华晶等样品测试MINIMOS模拟结果较为吻合。

基于MOSFET漏电流温度特性的室温红外探测器

基于MOSFET的漏电流温度特性,提出了一种可与CMOS工艺兼容的新型室温红外探测器。它采用在SOI衬底上实现的MOSFET作为探测红外灵敏元,在MOSFET的钝化层上制作可提高红外吸收率的光学谐振腔,并利用硅微机械加工技术将SOI的隐埋氧化层悬空,形成热绝缘微桥结构。MOSFET在担当探测红外辐射灵敏元的同时,又作为放大处理电路的一部分,简化了电路。分析表明,探测器的探测率可高达109～1010cmHz1/2W-1。

半绝缘GaAs衬底中AB微缺陷对MESFET器件性能的影响

研究了LEC法生长SI GaAs衬底上的AB微缺陷对相应的MESFET器件性能 (跨导、饱和漏电流、夹断电压 )的影响 .用AB腐蚀液显示AB微缺陷 (AB EPD :10 3 ～ 10 4cm-2 量级 ) ,用KOH腐蚀液显示位错 (EPD :10 4cm-2 量级 ) ,发现衬底上的AB微缺陷对器件性能及均匀性有显著影响 .随着AB EPD的增大 ,跨导、饱和漏电流变小 ,夹断电压的绝对值也变小 .利用扫描光致发光光谱 (PLmapping)对衬底质量进行了测量 ,结果表明衬底参数好的样品 ,PL参数好 ,相应器件的参数也好 。

HgI_2探测器中晶体表面处理的研究

该文研究了HgI2晶体表面状况对晶体电学性质的影响,主要探讨在不同的腐蚀条件下KI溶液腐蚀HgI2晶体时,得到不同的表面状况,从而对HgI2晶体电学性质产生的影响.扫描电镜(SEM)、X射线光电子能谱(XPS)及微电流计分析表明,通过化学腐蚀,在0℃时,用浓度为10%～20%KI溶液,腐蚀时间2min左右,可以得到较好的晶体表面状况.上述工艺条件,能够很大程度上优化HgI2晶体的电学参数,从而提高HgI2核探测器的性能.

施主型界面态引起深亚微米槽栅PMOS特性的退化

基于流体动力学能量输运模型 ,对沟道杂质浓度不同的槽栅和平面 PMOSFET中施主型界面态引起的器件特性的退化进行了研究 ,并与受主型界面态的影响进行了对比 .研究结果表明同样浓度的界面态在槽栅器件中引起的器件特性的漂移远大于平面器件 ,且 N型施主界面态密度对器件特性的影响远大于 P型界面态 ,N型施主界面态引起器件特性的退化趋势与 P型受主界面态相似 ,而 P型施主界面态则与 N型受主界面态相似 .沟道杂质浓度不同 。