Recently,switched Ethernet has become an active area of research because of its wide uses in industry.However,its uses have various real-time constraints on data communications.This paper analyzes the performance of t...Recently,switched Ethernet has become an active area of research because of its wide uses in industry.However,its uses have various real-time constraints on data communications.This paper analyzes the performance of the line topology switched Ethernet as a data acquisition network.Network calculus theory,which has been successfully applied to assess the real-time performance of packet-switched networks,is used to analyze the networks.To properly describe the activity of switches,a novel approach of modeling data flows into or out of switches is addressed.Based on our model,a concisely analytical expression of the maximal end-to-end delay in line topology switched Ethernet is derived.Finally,the relative simulation results are demonstrated.These results agree well with the analytical results,and thus they validate the data flow modeling techniques.展开更多
Designing an Ethernet switch that can assure normal interaction of protocol packets between switches in a network environment of massive traffic is an important matter. Taking the L3 Ethernet switch based on Applicati...Designing an Ethernet switch that can assure normal interaction of protocol packets between switches in a network environment of massive traffic is an important matter. Taking the L3 Ethernet switch based on Application Specific Integrated Circuit (ASIC) as an example,this article analyzes several typical issues about packet receiving and sending by the CPU in a multi-progress environment,including CPU load,software and hardware queue settings,and communication mechanism between CPU and the switch chip. This article gives solutions to these issues mentioned above. The solutions are applicable to Network Processor (NP) issues as well.展开更多
Avionics full duplex switched ethernet（AFDX） is a switched interconnection technology developed to provide reliable data exchange with strong data transmission time guarantees in internal communication of the spacec...Avionics full duplex switched ethernet（AFDX） is a switched interconnection technology developed to provide reliable data exchange with strong data transmission time guarantees in internal communication of the spacecraft or aircraft.Virtual link（VL） is an important concept of AFDX to meet quality of service（QoS） requirements in terms of end-to-end message deadlines.A VL admission control algorithm in AFDX network under hard real-time（HRT） constraints is studied.Based on the scheduling prin-ciple of AFDX protocol,a packet scheduling scheme under HRT constraints is proposed,and after that an efficient VL admission control algorithm is presented.Analytical proof that the algorithm can effectively determine whether VL should be admitted is given.Finally simulative examples are presented to promote the conclusion.展开更多
文摘Recently,switched Ethernet has become an active area of research because of its wide uses in industry.However,its uses have various real-time constraints on data communications.This paper analyzes the performance of the line topology switched Ethernet as a data acquisition network.Network calculus theory,which has been successfully applied to assess the real-time performance of packet-switched networks,is used to analyze the networks.To properly describe the activity of switches,a novel approach of modeling data flows into or out of switches is addressed.Based on our model,a concisely analytical expression of the maximal end-to-end delay in line topology switched Ethernet is derived.Finally,the relative simulation results are demonstrated.These results agree well with the analytical results,and thus they validate the data flow modeling techniques.
文摘Designing an Ethernet switch that can assure normal interaction of protocol packets between switches in a network environment of massive traffic is an important matter. Taking the L3 Ethernet switch based on Application Specific Integrated Circuit (ASIC) as an example,this article analyzes several typical issues about packet receiving and sending by the CPU in a multi-progress environment,including CPU load,software and hardware queue settings,and communication mechanism between CPU and the switch chip. This article gives solutions to these issues mentioned above. The solutions are applicable to Network Processor (NP) issues as well.
基金National Natural Science Foundation of China (60879024)
文摘Avionics full duplex switched ethernet（AFDX） is a switched interconnection technology developed to provide reliable data exchange with strong data transmission time guarantees in internal communication of the spacecraft or aircraft.Virtual link（VL） is an important concept of AFDX to meet quality of service（QoS） requirements in terms of end-to-end message deadlines.A VL admission control algorithm in AFDX network under hard real-time（HRT） constraints is studied.Based on the scheduling prin-ciple of AFDX protocol,a packet scheduling scheme under HRT constraints is proposed,and after that an efficient VL admission control algorithm is presented.Analytical proof that the algorithm can effectively determine whether VL should be admitted is given.Finally simulative examples are presented to promote the conclusion.
