Thermal conductivity is an important material parameter of silicon when studying the performance and reliability of devices or for guiding circuit design when considering heat dissipation, especially when the self-hea...Thermal conductivity is an important material parameter of silicon when studying the performance and reliability of devices or for guiding circuit design when considering heat dissipation, especially when the self-heating effect becomes prominent in ultra-scaled MOSFETs.The cross-plane thermal conductivity of a thin silicon film is lacking due to the difficulty in sensing high thermal conductivity in the vertical direction.In this paper, a feasible method that utilizes an ultra-fast electrical pulse within 20 μs combined with the hot strip technique is adopted.To the best of our knowledge, this is the first work that shows how to extract the cross-plane thermal conductivity of sub-50 nm(30 nm, 17 nm, and 10 nm)silicon films on buried oxide.The ratio of the extracted cross-plane thermal conductivity of the silicon films over the bulk value is only about 6.9%, 4.3%, and 3.8% at 300 K, respectively.As the thickness of the films is smaller than the phonon mean free path, the classical heat transport theory fails to predict the heat dissipation in nanoscale transistors.Thus, in this study, a ballistic model, derived from the heat transport equation based on extended-irreversible-hydrodynamics(EIT), is used for further investigation, and the simulation results exhibit good consistence with the experimental data.The extracted effective thermal data could provide a good reference for precise device simulations and thermoelectric applications.展开更多
A 30 MHz voltage-mode controlled buck converter with fast transient responses is presented.An improved differential difference amplifier(DDA)-based Type-III compensator is proposed to reduce the settling times of the ...A 30 MHz voltage-mode controlled buck converter with fast transient responses is presented.An improved differential difference amplifier(DDA)-based Type-III compensator is proposed to reduce the settling times of the converter during load transients,and to achieve near-optimal transient responses with simple PWM control only.Moreover,a hybrid scheme using a digital linear regulator with automatic transient detection and seamless loop transition is proposed to further improve the transient responses.By monitoring the output voltage of the compensator instead of the output voltage of the converter,the proposed hybrid scheme can reduce undershoot and overshoot effectively with good noise immunity and without interrupting the PWM loop.The converter was fabricated in a 0.13μm standard CMOS process using 3.3 V devices.With an input voltage of 3.3 V,the measured peak efficiencies at the output voltages of 2.4,1.8,and 1.2 V are 90.7%,88%,and 83.6%,respectively.With a load step of 1.25 A and rise and fall times of 2 ns,the measured 1%settling times were 220 and 230 ns,with undershoot and overshoot with PWM control of 72 and 76 mV,respectively.They were further reduced to 36 and 38 mV by using the proposed hybrid scheme,and 1%settling times were also reduced to 125 ns.展开更多
A novel optical transient suppression technique to dramatically reduce gain variation of EDFA with un-cooled pump is demonstrated experimentally, showing excellent performance of 50us transient time with no more than ...A novel optical transient suppression technique to dramatically reduce gain variation of EDFA with un-cooled pump is demonstrated experimentally, showing excellent performance of 50us transient time with no more than 0.5dB excursion and 0.25dB offset.展开更多
There are some difficulties in using multi-transmission-line (MTL) model for wide band modeling of whole windings of the large power transformer. In this paper, the normalized MTL model is firstly de- rived, with whic...There are some difficulties in using multi-transmission-line (MTL) model for wide band modeling of whole windings of the large power transformer. In this paper, the normalized MTL model is firstly de- rived, with which not only the difficulty of modeling windings with different turn-lengths using MTL can be solved, but also the model can be extended to the modeling of the multi-winding transformer. Secondly, both MTL model and the lumped circuit model on turn basis are mathematically compared in validation of the frequency range and it is pointed out that the lumped circuit model on turn basis is generally valid below 2.5 MHz for EHV and UHV power transformers. Finally, based on the MTL equations, a novel lumped circuit model is derived and it is shown that the valid frequency range of the new circuit is extended to about 4 MHz for modeling large EHV and UHV power transformer windings.展开更多
In large loop transient electromagnetic method(TEM),the late time apparent resistivity formula cannot truly reflect the geoelectric model,thus it needs to define the all-time apparent resistivity with the position inf...In large loop transient electromagnetic method(TEM),the late time apparent resistivity formula cannot truly reflect the geoelectric model,thus it needs to define the all-time apparent resistivity with the position information of measuring point.Utilizing very fast simulated annealing(VFSA) to fit the theoretical electromagnetic force(EMF) and measured EMF could obtain the all-time apparent resistivity of the measuring points in rectangular transmitting loop.The selective cope of initial model of VFSA could be confirmed by taking the late time apparent resistivity of transient electromagnetic method as the prior information.For verifying the correctness,the all-time apparent resistivities of the geoelectric models were calculated by VFSA and dichotomy,respectively.The results indicate that the relative differences of apparent resistivities calculated by these two methods are within 3%.The change of measuring point position has little influence on the tracing pattern of all-time apparent resistivity.The first branch of the curve of all-time apparent resistivity is close to the resistivity of the first layer medium and the last branch is close to the resistivity of the last layer medium,which proves the correctness of the arithmetics proposed.展开更多
In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loo...In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loop with the dynamic strength control(DSC),is proposed in this paper,which overcomes trade-offs inherent in conventional structures.The presented design addresses and resolves the large signal stability issue,which has been previously overlooked in the event-driven charge pump structure.This breakthrough allows for the full exploitation of the charge-pump structure's poten-tial,particularly in enhancing transient recovery.Moreover,a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage,leading to favorable static characteristics.A prototype chip has been fabricated in 65 nm CMOS technology.The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current(IQ)and can recover within 30 ns under 200 mA/10 ns loading change.展开更多
GIS中的隔离开关在操作过程中由于断口重复击穿会产生特快速瞬态过电压(very fast transient overvoltage,VFTO)。VFTO幅值高、波前陡,严重威胁电气一次绝缘,并会产生电磁干扰问题。目前,实际工程中除采用带投切电阻的隔离开关抑制VFTO...GIS中的隔离开关在操作过程中由于断口重复击穿会产生特快速瞬态过电压(very fast transient overvoltage,VFTO)。VFTO幅值高、波前陡,严重威胁电气一次绝缘,并会产生电磁干扰问题。目前,实际工程中除采用带投切电阻的隔离开关抑制VFTO外,还可以采用磁环型阻尼母线对VFTO进行抑制。为了保证GIS的可靠性,磁环型阻尼母线抑制性能的优劣至关重要。为此,亟需研究提出一种在试验室进行磁环抑制效果的评定方法。文中针对磁环型阻尼母线的抑制性能,设计了专门的抑制性能试验回路,该试验回路中主要包含套管、阻尼电阻、放电间隙、磁环型阻尼母线、GIS短母线、VFTO传感器以及VFTO测量系统。该试验回路的额定电压为1100 kV,回路中的套管和母线可承受的额定工频电压为1100 kV,阻尼电阻的阻值为560Ω或1500Ω,放电间隙可以通过电极间距的调整产生不同等级的放电电压值和放电陡波,陡波上升时间可以达到30 ns。应用该试验回路在试验室进行模拟试验的方法检验磁环型阻尼母线的抑制效果,试验结果表明,该试验回路可以完成磁环型阻尼母线抑制效果的检验,可以定量地给出抑制效果的优劣。该方法可以推广到其他电压等级的GIS产品中,有助于推动实现磁环型阻尼母线的工业化设计、制造及检验。展开更多
基金Project supported by the Zhejiang Provincial Natural Science Foundation of China(Grant No.LZ19F040001)the National Natural Science Foundation of China(Grant No.61473287)the NSFC–Zhejiang Joint Fund for the Integration of Industrialization Informatization,China(Grant No.U1609213)
文摘Thermal conductivity is an important material parameter of silicon when studying the performance and reliability of devices or for guiding circuit design when considering heat dissipation, especially when the self-heating effect becomes prominent in ultra-scaled MOSFETs.The cross-plane thermal conductivity of a thin silicon film is lacking due to the difficulty in sensing high thermal conductivity in the vertical direction.In this paper, a feasible method that utilizes an ultra-fast electrical pulse within 20 μs combined with the hot strip technique is adopted.To the best of our knowledge, this is the first work that shows how to extract the cross-plane thermal conductivity of sub-50 nm(30 nm, 17 nm, and 10 nm)silicon films on buried oxide.The ratio of the extracted cross-plane thermal conductivity of the silicon films over the bulk value is only about 6.9%, 4.3%, and 3.8% at 300 K, respectively.As the thickness of the films is smaller than the phonon mean free path, the classical heat transport theory fails to predict the heat dissipation in nanoscale transistors.Thus, in this study, a ballistic model, derived from the heat transport equation based on extended-irreversible-hydrodynamics(EIT), is used for further investigation, and the simulation results exhibit good consistence with the experimental data.The extracted effective thermal data could provide a good reference for precise device simulations and thermoelectric applications.
文摘A 30 MHz voltage-mode controlled buck converter with fast transient responses is presented.An improved differential difference amplifier(DDA)-based Type-III compensator is proposed to reduce the settling times of the converter during load transients,and to achieve near-optimal transient responses with simple PWM control only.Moreover,a hybrid scheme using a digital linear regulator with automatic transient detection and seamless loop transition is proposed to further improve the transient responses.By monitoring the output voltage of the compensator instead of the output voltage of the converter,the proposed hybrid scheme can reduce undershoot and overshoot effectively with good noise immunity and without interrupting the PWM loop.The converter was fabricated in a 0.13μm standard CMOS process using 3.3 V devices.With an input voltage of 3.3 V,the measured peak efficiencies at the output voltages of 2.4,1.8,and 1.2 V are 90.7%,88%,and 83.6%,respectively.With a load step of 1.25 A and rise and fall times of 2 ns,the measured 1%settling times were 220 and 230 ns,with undershoot and overshoot with PWM control of 72 and 76 mV,respectively.They were further reduced to 36 and 38 mV by using the proposed hybrid scheme,and 1%settling times were also reduced to 125 ns.
文摘A novel optical transient suppression technique to dramatically reduce gain variation of EDFA with un-cooled pump is demonstrated experimentally, showing excellent performance of 50us transient time with no more than 0.5dB excursion and 0.25dB offset.
文摘There are some difficulties in using multi-transmission-line (MTL) model for wide band modeling of whole windings of the large power transformer. In this paper, the normalized MTL model is firstly de- rived, with which not only the difficulty of modeling windings with different turn-lengths using MTL can be solved, but also the model can be extended to the modeling of the multi-winding transformer. Secondly, both MTL model and the lumped circuit model on turn basis are mathematically compared in validation of the frequency range and it is pointed out that the lumped circuit model on turn basis is generally valid below 2.5 MHz for EHV and UHV power transformers. Finally, based on the MTL equations, a novel lumped circuit model is derived and it is shown that the valid frequency range of the new circuit is extended to about 4 MHz for modeling large EHV and UHV power transformer windings.
基金Projects(40804027,41074085) supported by the National Natural Science Foundation of ChinaProject(09JJ3048) supported by the Natural Science Foundation of Hunan Province,ChinaProject(200805331082) supported by the Research Fund for the Doctoral Program of Higher Education,China
文摘In large loop transient electromagnetic method(TEM),the late time apparent resistivity formula cannot truly reflect the geoelectric model,thus it needs to define the all-time apparent resistivity with the position information of measuring point.Utilizing very fast simulated annealing(VFSA) to fit the theoretical electromagnetic force(EMF) and measured EMF could obtain the all-time apparent resistivity of the measuring points in rectangular transmitting loop.The selective cope of initial model of VFSA could be confirmed by taking the late time apparent resistivity of transient electromagnetic method as the prior information.For verifying the correctness,the all-time apparent resistivities of the geoelectric models were calculated by VFSA and dichotomy,respectively.The results indicate that the relative differences of apparent resistivities calculated by these two methods are within 3%.The change of measuring point position has little influence on the tracing pattern of all-time apparent resistivity.The first branch of the curve of all-time apparent resistivity is close to the resistivity of the first layer medium and the last branch is close to the resistivity of the last layer medium,which proves the correctness of the arithmetics proposed.
基金supported by the National Natural Science Foundation of China under Grant 62274189the Natural Science Foundation of Guangdong Province,China,under Grant 2022A1515011054the Key Area R&D Program of Guangdong Province under Grant 2022B0701180001.
文摘In this paper,an NMOS output-capacitorless low-dropout regulator(OCL-LDO)featuring dual-loop regulation has been proposed,achieving fast transient response with low power consumption.An event-driven charge pump(CP)loop with the dynamic strength control(DSC),is proposed in this paper,which overcomes trade-offs inherent in conventional structures.The presented design addresses and resolves the large signal stability issue,which has been previously overlooked in the event-driven charge pump structure.This breakthrough allows for the full exploitation of the charge-pump structure's poten-tial,particularly in enhancing transient recovery.Moreover,a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage,leading to favorable static characteristics.A prototype chip has been fabricated in 65 nm CMOS technology.The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current(IQ)and can recover within 30 ns under 200 mA/10 ns loading change.