An analytical model for Network-on-Chip with finite input buffer

An analytical model is proposed for input buffer router architecture Network-on-Chip （NoC） with finite size buffers. The model is developed based on M/G/ 1/K queuing theory and takes into consideration the restriction of buffer sizes in NoC. It analyzes the packet＇s sojourn time in each buffer and calculates the packets average latency in NoC The validity of the model is verified through simulation. By comparing our analytical outcomes to the simulation results, we show that the proposed model successfully captures the performance characteristics of NoC, which provides an efficient performance analysis tool for NoC design.

Dynamic Performance Prediction in Batch-Based Assembly System with Bernoulli Machines and Changeovers

Worldwide competition and diverse demand of customers pose great challenges to manufacturing enterprises. How to organize production to achieve high productivity and low cost becomes their primary task. In the mean time, the rapid pace of technology innovation has contributed to the development of new types of flexible automation. Hence, increasing manufacturing enterprises convert to multi-product and small-batch production, a manufacturing strategy that brings increased output, reduced costs, and quick response to the market. A distinctive feature of small-batch production is that the system operates mainly in the transient states. Transient states may have a significant impact on manufacturing systems. It is therefore necessary to estimate the dynamic performance of systems. As the assembly system is a typical class of production systems, in this paper, we focus on the problem of dynamic performance prediction of the assembly systems that produce small batches of different types of products. And the system is assumed to be characterized with Bernoulli reliability machines, finite buffers, and changeovers. A mathematical model based on Markovian analysis is first derived and then, the analytical formulas for performance evaluation of three-machine assembly systems are given. Moreover, a novel approach based on decomposition and aggregation is proposed to predict dynamic performance of large-scale assembly systems that consist of multiple component lines and additional processing machines located downstream of the assemble machine. The proposed approach is validated to be highly accurate and computationally efficient when compared to Monte Carlo simulation.

ANALYSIS OF DISCRETE-TIME QUEUES WITH BATCH RENEWAL INPUT AND MULTIPLE VACATIONS

This paper analyzes a discrete-time multiple vacations finite-buffer queueing system with batch renewal input in which inter-arrival time of batches are arbitrarily distributed. Service and vacation times are mutually independent and geometrically distributed. The server takes vacations when the system does not have any waiting jobs at a service completion epoch or a vacation completion epoch. The system is analyzed under the assumptions of late arrival system with delayed access and early arrival system. Using the supplementary variable and the imbedded Markov chain techniques, the authors obtain the queue-length distributions at pre-arrival, arbitrary and outside observer＇s ob- servation epochs for partial-batch rejection policy. The blocking probability of the first, an arbitrary- and the last-job in a batch have been discussed. The analysis of actual waiting-time distributions measured in slots of the first, an arbitrary- and the last-job in an accepted batch, and other performance measures along with some numerical results have also been investigated.