This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current cons...This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC's power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.展开更多
The obstacle for idea generation in fuzzy front end (FFE) is difficult to apply knowledge in different fields for designers. Theory of inventive problem solving TRIZ and computer-aided innovation systems (CAIs) wh...The obstacle for idea generation in fuzzy front end (FFE) is difficult to apply knowledge in different fields for designers. Theory of inventive problem solving TRIZ and computer-aided innovation systems (CAIs) which are TRIZ-base software systems with a knowledge base provide a framework for knowledge application in different fields. The major methods in TRIZ are selected, which have four types. The problems to be solved for each method are summarized and mapping from the problems to the methods is given. Systematic method with eight paths to integrate the methods and problems is formed. A case study shows the idea generation in FFE using the integrated method step by step.展开更多
Extracting characteristic brain signals and simultaneous recording animals behaving could help us to understand the complex behavior of neuronal ensembles. Here, a system was established to record local field potentia...Extracting characteristic brain signals and simultaneous recording animals behaving could help us to understand the complex behavior of neuronal ensembles. Here, a system was established to record local field potentials (LFP) and extracellular signal or multiple-unit discharge and behavior synchronously by utilizing electrophysiology and integrated circuit technique. It comprised microelectrodes and micro-driver assembly, analog front end (AFE),while a computer (Pentium III ) was used as the platform for the graphic user interface, which was developed using the LabVIEW programming language. It was designed as a part of ongoing research to develop a portable wireless neural signal recording system. We believe that this information will be useful for the research of brain-computer interface.展开更多
Masks are critical elements of synchrotron radiation front end that are exposed to high temperature and stress.The absorber material is typically comprised of dispersion-strengthened copper,which can retain high perfo...Masks are critical elements of synchrotron radiation front end that are exposed to high temperature and stress.The absorber material is typically comprised of dispersion-strengthened copper,which can retain high performance at elevated temperature.Joining processes under vacuum,including brazing and electron beam welding,are novel approaches for prolonging the absorber and for reducing power densities.The mechanical properties of brazed joints and electron beam welded joints of dispersion-strengthened copper workpieces are evaluated by tensile testing at 20,100,and 200 C.The testing results indicate that the tensile strength and elongation of both vacuum joints decrease with increasing temperature.Compared to brazed joints,electron beam welded joints have higher tensile strength,better ductility,and more stable performance.A novel welded mask with a total length of 600 mm is presented and shown to be practical for use in the highest heat load front end in the Shanghai synchrotron radiation facility phase-Ⅱ beamline project.展开更多
A formula of calculating curvature radius was deduced according to the theory of rolling, together with the characteristics of rolling process. Moreover, the simulation of producing process is represented. Simulating ...A formula of calculating curvature radius was deduced according to the theory of rolling, together with the characteristics of rolling process. Moreover, the simulation of producing process is represented. Simulating results indicate that the curvature radius could be reduced by increasing friction coefficient, friction coefficient ratio, reduction or roller radius, while it could be augmented by increasing the thickness of plate. Furthermore, increasing the thickness of plate would cause more effects on front end curvature, whereas reduction would do less. The result provides theoretic basis for eliminating the front end curvature in plate and sheet rolling process, and it is important to protect controlling equipment and reduce scrap as well.展开更多
Purpose Digital low-level radio frequency(LLRF)system has been proposed for 166.6 MHz superconducting cavities at High Energy Photon Source.The RF field inside the cavities has to be controlled better than 0.03%(rms)i...Purpose Digital low-level radio frequency(LLRF)system has been proposed for 166.6 MHz superconducting cavities at High Energy Photon Source.The RF field inside the cavities has to be controlled better than 0.03%(rms)in amplitude and 0.03°(rms)in phase.A RF front end system is required to transform the RF signal from the cavity to IF signal before inputting into the digital signal processing(DSP)board,and up-convert the IF signal back to RF to drive the power amplifier.Methods Connectorized off-the-shelf microwave components were used to realize the RF front end system.The local oscillator generation and distribution,choices of main components and design of down-/up-conversion channels have been elaborated in detail with a focus on minimizing nonlinearity and signal interferences among channels with optimized signal distribution loss.Results and conclusions The RF front end has been incorporated with the existing DSP board and tested on a warm 166.6 MHz cavity in the laboratory.Excellent channel isolations and good linearities were achieved on the RF front end system.The RF field inside the cavity was controlled with a residual noise of 0.004%(rms)in amplitude and 0.002°(rms)in phase,well below the HEPS specifications.The sensitivity to ambient environment changes have also been studied and presented in this paper.This demonstrates a first high-performance 166.6 MHz RF front end system and provides valuable insights into HEPS LLRF system development in the future.展开更多
An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise- c...An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise- canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier (RFA) further am- plifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down- converts the signals to the intermediate frequency (IF) band and conveys the signals to the analogue blocks. The local oscillator (LO) buffer divides the output frequency of the voltage controlled oscillator (VCO) and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than -26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is -43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220×280 μm2.展开更多
This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmab...This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmable gain amplifier, a 9.8 ppm/℃ bandgap reference and on-chip low-output voltage regulators. A two segment capacitive array structure (6 MSB 5 LSB) composed by split capacitors is designed for the SAR core to save area cost and release reference voltage accuracy requirements. Implemented in the GSMC 0.13 #m 1.5 V/12 V dual-gate 4P6M e-flash process, the analog front end occupies an area of 0.457 mm2 and consumes power of 18.8 mW, in which 1.1 mW cost by the SAR ADC. Measured at 500 kHz input, the spurious-free dynamic range and signal-to-noise plus distortion ratio of the ADC are 71.57 dB and 60.60 dB respectively, achieving a figure of merit of 350 U/conversion-step.展开更多
Harvesting the energy from ocean waves is one of the greatest attractions for energy engineers and scientists. Till date, plenty of methods have been adopted to harvest the energy from the ocean waves. However, due to...Harvesting the energy from ocean waves is one of the greatest attractions for energy engineers and scientists. Till date, plenty of methods have been adopted to harvest the energy from the ocean waves. However, due to technological and economical complexity, it is intricate to involve the majority of these energy harvesters in the real ocean environment. Effective utilization and sustain- ability of any wave energy harvester depend upon its adaptability in the irregular seasonal waves, situation capability in maximum energy extraction and finally fulfilling the economic barriers. In this paper, the front end energy conversions are reviewed in detail which is positioned in the first stage of the wave energy converter among other stages such as power take off (PTO) and electrical energy conversion. If the recent development of these front end energy conversion is well known then developing wave energy converter with economic and commercial viability is possible. The aim of this review is to provide information on front end energy conversion of a point absorber and emphasize the strategies and calamity to be considered in designing such kinds of devices to improve the energy harvesting competence. This will be useful to the engineers for speeding up the development of a matured point absorbing type wave energy converter.展开更多
A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlat...A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlated double sampler(CDS) with programmable gain functionality,a 14-bit analog-to-digital converter and a programmable timing core.To achieve the maximum dynamic range,the VGA proposed here can linearly amplify the input signal in a gain range from-1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth.A novel CDS takes image information out of noise,and further amplifies the signal accurately in a gain range from 0 to 18 dB in0.035 dB step.A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity.An internal timing core can provide flexible timing for CCD arrays,CDS and ADC.The proposed AFE was fabricated in SMIC 0.18 μm CMOS process.The whole circuit occupied an active area of 2.8×4.8 mm^2 and consumed360 mW.When the frequency of input signal is 6.069 MHz,and the sampling frequency is 40 MHz,the signal to noise and distortion(SNDR) is 70.3 dB,the effective number of bits is 11.39 bit.展开更多
This paper presents a low power tunable active inductor and RF band pass filter suitable for multiband RF front end circuits. The active inductor circuit uses the PMOS cascode structure as the negative transconductor ...This paper presents a low power tunable active inductor and RF band pass filter suitable for multiband RF front end circuits. The active inductor circuit uses the PMOS cascode structure as the negative transconductor of a gyrator to reduce the noise voltage. Also, this structure provides possible negative resistance to reduce the inductor loss with wide inductive bandwidth and high resonance frequency. The RF band pass filter is realized using the proposed active inductor with suitable input and output buffer stages. The tuning of the center frequency for multiband operation is achieved through the controllable current source. The designed active inductor and RF band pass filter are simulated in 180 nm and 45 nm CMOS process using the Synopsys HSPICE simulation tool and their performances are compared. The parameters, such as resonance frequency, tuning capability, noise and power dissipation, are analyzed for these CMOS technologies and discussed. The design of a third order band pass filter using an active inductor is also presented.展开更多
RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and sche...RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and schematics of the RF board and the test results are given.In view of the inevitable inconsistency in the multi-channel circuit,a calibration circuit is designed to reduce such an influence.The test results show that the calibration method is useful for beam current dependence which is sensitive to channels inconsistency.展开更多
The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation f...The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.展开更多
This paper presents efficient processing engines for software-defined radio (SDR) front-ends. These engines, based on a polyphase channelizer, perform arbitrary sample-rate changes, frequency selection, and bandwidt...This paper presents efficient processing engines for software-defined radio (SDR) front-ends. These engines, based on a polyphase channelizer, perform arbitrary sample-rate changes, frequency selection, and bandwidth control. This paper presents an M-path polyphase filter bank based on a modified N-path polyphase filter. Such a system allows resampling by arbitrary ratios while performing baseband aliasing from center frequencies at Nyquist zones that are not multiples of the output sample rate. This resampling technique is based on sliding cyclic data load interacting with cyclic-shifted coefficients. A non-maximally-decimated polyphase filterbank (where the number of data loads is not equal to the number of M subfilters) processes M subfilters in a time period that is less than or greater than the M data loads. A polyphase filter bank with five different resampling modes is used as a case study for embedded resamp/ing in SDR front-ends. These modes are (i) maximally decimated, (ii) Under-decimated, (iii) over-decimated, and combined up- and down-sampling with (iv) single stride length, and (v) multiple stride lengths. These modes can be used to obtain any required rational sampling rate change in an SDR front-end based on a polyphase channelizer. They can also be used for translation to and from arbitrary center frequencies that are unrelated to the output sample rates.展开更多
An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VC...An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VCG) is suitable for multi-mode multi-standard( MMMS) applications. An equivalent local oscillator( LO) frequency-tunable high-Q band-pass filter( BPF) at low noise amplifier( LNA) output is used to reject the out-of-band interference signals. Base-band( BB) capacitor of the mixer is variable to obtain 15 kinds of intermediate frequency( IF) bandwidth( BW). The proposed passive mixer with LNA is implemented in TSMC 0. 18μm RF CMOS process and operates from 0. 5 to 2. 5 GHz with measured maximum out-of-band rejection larger than 40 d B. The measured VCG of the front-end can be changed from 5 to 17 d B; the maximum input intercept point( IIP3) is0 d Bm and the minimum noise figure( NF) is 3. 7 d B. The chip occupies an area of 0. 44 mm^2 including pads.展开更多
This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise c...This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity展开更多
Resistive Plate Chambers(RPCs) built from a new type of Bakelite developed at Institute of High Energy Physics(IHEP),Chinese Academy of Sciences have been used in the BESⅢ Muon identification system for several years...Resistive Plate Chambers(RPCs) built from a new type of Bakelite developed at Institute of High Energy Physics(IHEP),Chinese Academy of Sciences have been used in the BESⅢ Muon identification system for several years without linseed oil coating,but characteristic aging performances were observed.To adapt to the RPCs in the aging state,the front-end electronics have been upgraded by enhancing the front-end protection,improving the threshold setting circuit,and separating power supplies of the comparator and the field programmable gate array(FPGA).Improvements in system stability,front-end protection and threshold consistency have been achieved.In this paper,the system upgrade and the test results are described in detail.展开更多
A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitori...A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitoring.Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion,this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method.It performs satisfactorily,with the integral nonlinearity of less than ±0.04 nA in the range of-400 to 50 nA and the resolution of about±0.6 nA.展开更多
A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a p...A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.展开更多
文摘This paper introduces a high-performance analog front end for a passive UHF RFID transponder IC, which is compatible with the ISO/IEC 18000-6B standard,operating at the 915MHz ISM band with a total supply current consumption less than 8μA. There are no external components, except for the antenna. The passive IC's power supply is taken from the energy of the received RF electromagnetic field with the help of a Schottky diode rectifier. The RFID analog front end includes a local oscillator, clock generator, power on reset circuit, matching network and backscatter,rectifier,regulator, and AM demodulator. The IC, whose reading distance is more than 3m,is fabricated with a Chartered 0.35μm two-poly four-metal CMOS process with Schottky diodes and is EEPROM supported. The core size is 300μm × 720μm.
基金National Natural Science Foundation of China (No.50675059)National Hi-tech Research and Development Program of China (863 Program,No.2006AA04Z109)
文摘The obstacle for idea generation in fuzzy front end (FFE) is difficult to apply knowledge in different fields for designers. Theory of inventive problem solving TRIZ and computer-aided innovation systems (CAIs) which are TRIZ-base software systems with a knowledge base provide a framework for knowledge application in different fields. The major methods in TRIZ are selected, which have four types. The problems to be solved for each method are summarized and mapping from the problems to the methods is given. Systematic method with eight paths to integrate the methods and problems is formed. A case study shows the idea generation in FFE using the integrated method step by step.
基金Shandong Science Development FundGrant number:041120101
文摘Extracting characteristic brain signals and simultaneous recording animals behaving could help us to understand the complex behavior of neuronal ensembles. Here, a system was established to record local field potentials (LFP) and extracellular signal or multiple-unit discharge and behavior synchronously by utilizing electrophysiology and integrated circuit technique. It comprised microelectrodes and micro-driver assembly, analog front end (AFE),while a computer (Pentium III ) was used as the platform for the graphic user interface, which was developed using the LabVIEW programming language. It was designed as a part of ongoing research to develop a portable wireless neural signal recording system. We believe that this information will be useful for the research of brain-computer interface.
文摘Masks are critical elements of synchrotron radiation front end that are exposed to high temperature and stress.The absorber material is typically comprised of dispersion-strengthened copper,which can retain high performance at elevated temperature.Joining processes under vacuum,including brazing and electron beam welding,are novel approaches for prolonging the absorber and for reducing power densities.The mechanical properties of brazed joints and electron beam welded joints of dispersion-strengthened copper workpieces are evaluated by tensile testing at 20,100,and 200 C.The testing results indicate that the tensile strength and elongation of both vacuum joints decrease with increasing temperature.Compared to brazed joints,electron beam welded joints have higher tensile strength,better ductility,and more stable performance.A novel welded mask with a total length of 600 mm is presented and shown to be practical for use in the highest heat load front end in the Shanghai synchrotron radiation facility phase-Ⅱ beamline project.
基金Item Sponsored by Natural Science Foundation of Shaanxi Province of China (2004E19)
文摘A formula of calculating curvature radius was deduced according to the theory of rolling, together with the characteristics of rolling process. Moreover, the simulation of producing process is represented. Simulating results indicate that the curvature radius could be reduced by increasing friction coefficient, friction coefficient ratio, reduction or roller radius, while it could be augmented by increasing the thickness of plate. Furthermore, increasing the thickness of plate would cause more effects on front end curvature, whereas reduction would do less. The result provides theoretic basis for eliminating the front end curvature in plate and sheet rolling process, and it is important to protect controlling equipment and reduce scrap as well.
基金supported by the High Energy Photon Source-Test Facility(HEPS-TF)projectPioneer"Hundred Talents Program of Chinese Academy of Sciences
文摘Purpose Digital low-level radio frequency(LLRF)system has been proposed for 166.6 MHz superconducting cavities at High Energy Photon Source.The RF field inside the cavities has to be controlled better than 0.03%(rms)in amplitude and 0.03°(rms)in phase.A RF front end system is required to transform the RF signal from the cavity to IF signal before inputting into the digital signal processing(DSP)board,and up-convert the IF signal back to RF to drive the power amplifier.Methods Connectorized off-the-shelf microwave components were used to realize the RF front end system.The local oscillator generation and distribution,choices of main components and design of down-/up-conversion channels have been elaborated in detail with a focus on minimizing nonlinearity and signal interferences among channels with optimized signal distribution loss.Results and conclusions The RF front end has been incorporated with the existing DSP board and tested on a warm 166.6 MHz cavity in the laboratory.Excellent channel isolations and good linearities were achieved on the RF front end system.The RF field inside the cavity was controlled with a residual noise of 0.004%(rms)in amplitude and 0.002°(rms)in phase,well below the HEPS specifications.The sensitivity to ambient environment changes have also been studied and presented in this paper.This demonstrates a first high-performance 166.6 MHz RF front end system and provides valuable insights into HEPS LLRF system development in the future.
文摘An inductorless multi-mode RF front end for a global navigation satellite system (GNSS) receiver is presented. Unlike the traditional topology of a low noise amplifier (LNA), the inductorless current-mode noise- canceling LNA is applied in this design. The high-impedance-input radio frequency amplifier (RFA) further am- plifies the GNSS signals and changes the single-end signal path into fully differential. The passive mixer down- converts the signals to the intermediate frequency (IF) band and conveys the signals to the analogue blocks. The local oscillator (LO) buffer divides the output frequency of the voltage controlled oscillator (VCO) and generates 25%-duty-cycle quadrature square waves to drive the mixer. Our measurement results display that the implemented RF front end achieves good overall performance while consuming only 6.7 mA from 1.2 V supply. The input return loss is better than -26 dB and the ultra low noise figure of 1.43 dB leads to high sensitivity of the GNSS receiver. The input 1 dB compression point is -43 dBm at the high gain of 48 dB. The designed circuit is fabricated in 55 nm CMOS technology and the die area, which is much smaller than traditional circuit, is around 220×280 μm2.
文摘This paper presents an analog front end for a power line communication system, including a 12-bit 3.2-MS/s energy-efficient successive approximation register analog-to-digital converter, a positive feedback programmable gain amplifier, a 9.8 ppm/℃ bandgap reference and on-chip low-output voltage regulators. A two segment capacitive array structure (6 MSB 5 LSB) composed by split capacitors is designed for the SAR core to save area cost and release reference voltage accuracy requirements. Implemented in the GSMC 0.13 #m 1.5 V/12 V dual-gate 4P6M e-flash process, the analog front end occupies an area of 0.457 mm2 and consumes power of 18.8 mW, in which 1.1 mW cost by the SAR ADC. Measured at 500 kHz input, the spurious-free dynamic range and signal-to-noise plus distortion ratio of the ADC are 71.57 dB and 60.60 dB respectively, achieving a figure of merit of 350 U/conversion-step.
文摘Harvesting the energy from ocean waves is one of the greatest attractions for energy engineers and scientists. Till date, plenty of methods have been adopted to harvest the energy from the ocean waves. However, due to technological and economical complexity, it is intricate to involve the majority of these energy harvesters in the real ocean environment. Effective utilization and sustain- ability of any wave energy harvester depend upon its adaptability in the irregular seasonal waves, situation capability in maximum energy extraction and finally fulfilling the economic barriers. In this paper, the front end energy conversions are reviewed in detail which is positioned in the first stage of the wave energy converter among other stages such as power take off (PTO) and electrical energy conversion. If the recent development of these front end energy conversion is well known then developing wave energy converter with economic and commercial viability is possible. The aim of this review is to provide information on front end energy conversion of a point absorber and emphasize the strategies and calamity to be considered in designing such kinds of devices to improve the energy harvesting competence. This will be useful to the engineers for speeding up the development of a matured point absorbing type wave energy converter.
基金supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044, 61376033)the National High-Tech Program of China (No. 2013AA014103)the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory (No. ZHD201302)
文摘A 14-bit,40-MHz analog front end(AFE) for CCD scanners is analyzed and designed.The proposed system incorporates a digitally controlled wideband variable gain amplifier(VGA) with nearly 42 dB gain range,a correlated double sampler(CDS) with programmable gain functionality,a 14-bit analog-to-digital converter and a programmable timing core.To achieve the maximum dynamic range,the VGA proposed here can linearly amplify the input signal in a gain range from-1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth.A novel CDS takes image information out of noise,and further amplifies the signal accurately in a gain range from 0 to 18 dB in0.035 dB step.A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity.An internal timing core can provide flexible timing for CCD arrays,CDS and ADC.The proposed AFE was fabricated in SMIC 0.18 μm CMOS process.The whole circuit occupied an active area of 2.8×4.8 mm^2 and consumed360 mW.When the frequency of input signal is 6.069 MHz,and the sampling frequency is 40 MHz,the signal to noise and distortion(SNDR) is 70.3 dB,the effective number of bits is 11.39 bit.
文摘This paper presents a low power tunable active inductor and RF band pass filter suitable for multiband RF front end circuits. The active inductor circuit uses the PMOS cascode structure as the negative transconductor of a gyrator to reduce the noise voltage. Also, this structure provides possible negative resistance to reduce the inductor loss with wide inductive bandwidth and high resonance frequency. The RF band pass filter is realized using the proposed active inductor with suitable input and output buffer stages. The tuning of the center frequency for multiband operation is achieved through the controllable current source. The designed active inductor and RF band pass filter are simulated in 180 nm and 45 nm CMOS process using the Synopsys HSPICE simulation tool and their performances are compared. The parameters, such as resonance frequency, tuning capability, noise and power dissipation, are analyzed for these CMOS technologies and discussed. The design of a third order band pass filter using an active inductor is also presented.
基金Supported by 100 Talents Program of The Chinese Academy of Sciences
文摘RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and schematics of the RF board and the test results are given.In view of the inevitable inconsistency in the multi-channel circuit,a calibration circuit is designed to reduce such an influence.The test results show that the calibration method is useful for beam current dependence which is sensitive to channels inconsistency.
文摘The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.
文摘This paper presents efficient processing engines for software-defined radio (SDR) front-ends. These engines, based on a polyphase channelizer, perform arbitrary sample-rate changes, frequency selection, and bandwidth control. This paper presents an M-path polyphase filter bank based on a modified N-path polyphase filter. Such a system allows resampling by arbitrary ratios while performing baseband aliasing from center frequencies at Nyquist zones that are not multiples of the output sample rate. This resampling technique is based on sliding cyclic data load interacting with cyclic-shifted coefficients. A non-maximally-decimated polyphase filterbank (where the number of data loads is not equal to the number of M subfilters) processes M subfilters in a time period that is less than or greater than the M data loads. A polyphase filter bank with five different resampling modes is used as a case study for embedded resamp/ing in SDR front-ends. These modes are (i) maximally decimated, (ii) Under-decimated, (iii) over-decimated, and combined up- and down-sampling with (iv) single stride length, and (v) multiple stride lengths. These modes can be used to obtain any required rational sampling rate change in an SDR front-end based on a polyphase channelizer. They can also be used for translation to and from arbitrary center frequencies that are unrelated to the output sample rates.
基金Supported by the National Basic Research Program of China(No.2010CB327404)the Priority Academic Program Development of Jiangsu Higher Education Institutions
文摘An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VCG) is suitable for multi-mode multi-standard( MMMS) applications. An equivalent local oscillator( LO) frequency-tunable high-Q band-pass filter( BPF) at low noise amplifier( LNA) output is used to reject the out-of-band interference signals. Base-band( BB) capacitor of the mixer is variable to obtain 15 kinds of intermediate frequency( IF) bandwidth( BW). The proposed passive mixer with LNA is implemented in TSMC 0. 18μm RF CMOS process and operates from 0. 5 to 2. 5 GHz with measured maximum out-of-band rejection larger than 40 d B. The measured VCG of the front-end can be changed from 5 to 17 d B; the maximum input intercept point( IIP3) is0 d Bm and the minimum noise figure( NF) is 3. 7 d B. The chip occupies an area of 0. 44 mm^2 including pads.
文摘This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity
文摘Resistive Plate Chambers(RPCs) built from a new type of Bakelite developed at Institute of High Energy Physics(IHEP),Chinese Academy of Sciences have been used in the BESⅢ Muon identification system for several years without linseed oil coating,but characteristic aging performances were observed.To adapt to the RPCs in the aging state,the front-end electronics have been upgraded by enhancing the front-end protection,improving the threshold setting circuit,and separating power supplies of the comparator and the field programmable gate array(FPGA).Improvements in system stability,front-end protection and threshold consistency have been achieved.In this paper,the system upgrade and the test results are described in detail.
文摘A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitoring.Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion,this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method.It performs satisfactorily,with the integral nonlinearity of less than ±0.04 nA in the range of-400 to 50 nA and the resolution of about±0.6 nA.
基金Supported by the National Natural Science Foundation of China (No.40704025)
文摘A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.