FUZZY KNOWLEDGE ACQUIREMENT IN GATE DESIGN

In order to reduce time and cost in engineering design, such as gate design, integral field knowledge must be obtained efficiently. After studying ID3 and its improved methods, a new algorithm(Fuzzy ID3 ) and its main concepts are presented to overcome some disadvantage in classical ID3 algorithms. In its application of gate design, fuzzy knowledge gotten by the new algorithm is more efficient than the knowledge by other ID3 algorithms, the set of fuzzy knowledge is much smaller than that of knowledge by classical ID3 algorithms. On the other hand, fuzzy knowledge represents field data more naturally to the way of bar thinking and more robust in tolerating imprecise, conflicting and missing information

Adder design using a 5-input majority gate in a novel “multilayer gate design paradigm” for quantum dot cellular automata circuits

This paper proposes a novel design paradigm for circuits designed in quantum dot cellular automata （QCA） technology. Previously reported QCA circuits in the literature have generally been designed in a single layer which is the main logical block in which the inverter and majority gate are on the base layer, except for the parts where multilayer wire crossing was used. In this paper the concept of multilayer wire crossing has been extended to design logic gates in multilayers. Using a 5-input majority gate in a multilayer, a 1-bit and 2-bit adder have been designed in the proposed multilayer gate design paradigm. A comparison has been made with some adders reported previously in the literature and it has been shown that circuits designed in the proposed design paradigm are much more efficient in terms of area, the requirement of QCA cells in the design and the input-output delay of the circuit. Over all, the availability of one additional spatial dimension makes the design process much more flexible and there is scope for the customizability of logic gate designs to make the circuit compact.

Gate design and filling process analysis of the cavity in injection molding process

This paper presents a new geometry of an edge gate in the injection molding process called modified edge gate. The corners of current edge gate result in the turbu- lence of molten plastic into the cavity which leads to internal and external defects. The aim of the new geometry is to reduce the internal and external defects of injected part such as sink marks and short shot. The easier de-gating analysis for the new geometry to decrease the visible blemish of the injected part was proposed in this study. A modified edge gate was proposed for two circular fiat plates with thickness 1 ram. Finite element method （FEM） was used along with SolidWorks plastic. Internal and external defects of the injected part were analyzed via SolidWorks plastic. To validate the new geometry, an experimental study was implemented for two polypropylene （PP） cir- cular fiat plates with modified edge gate to confirm the simulation results. The contribution of this research is to modify the geometry of current edge gate by removing the corners of rectangular edge gate which leads to the reduction of scrap. The new geometry presents easier de- gating of gate and less visible blemish of the injected part. A smooth flow of molten plastic into the cavities reduces the internal and external defects. The outcome of this study demonstrates filling of the cavities with no short shot. In addition, no sink marks were detected with modified edge gate. Finally, the modified blemish on the injected part edge gate. edge gate has in comparison less visible with current edge gate.

Determination AHP Analysis of the Virtual Stage-Gate Process in the Global Scale Automotive Design

In this study, it is aimed to determine the ranking importance levels of the stages to be taken into consideration for new product development on a global scale in the automotive design process. New product design activity and stage-gate process differences between local automotive firms (serial production factory and stage-gate department in Turkey) and global automotive companies (serial production factory and stage-gate department in Turkey) are examined comparatively in the research area. In the automotive industry, which has been developing for a century, the question of how the local company products operating in the last sixty years have not been able to spread globally or how to develop global products is the background question of the research. For this purpose, one on one interviews were held with the managers of 3 national and 3 international automotive companies, who worked in the same region and who had previously designed a new vehicle, with design and product development departments.?According to?the data obtained by the AHP (Analytic Hierarchy Process) in the automotive design process, the importance of the criteria that should be taken into account for global product development has revealed. According to the results of the study, it was found that design validation stages were the most important globalization criterion in automotive design process as a new study area. In the comprehensive survey of the study, no other publication has been encountered to measure or evaluate the stages in the automotive design and new product development process in other sectors, including the vehicle industry. As in every industry sector, in the automotive industry, with the new product companies provide market development or competitive advantage. The new product is the life channel of a company and in the realization of this new vehicle;the disciplines of the automotive industry are formed by a hundred years of experience.

Design and Assembly of an Improvised Logic Gates Simulator

This study aimed at designing and assembling an improvised Logic Gates Simulator that can be utilized as an instructional device in basic digital electronics instruction at Caraga State University Cabadbaran Campus, Philippines. This instructional device is believed to enhance the teaching-learning process and would also help address the scarcity of instructional equipment in the school and in the country. Descriptive method of research was employed to come up with the design of the simulator based on the course content of basic digital electronics subject. Acceptability of the improvised simulator based on standards set in this study was?gathered from the experts as respondents using a self-made questionnaire. The data were treated using average weighted mean utilizing parametric scales with verbal descriptions. Findings revealed that the improvised logic gates simulator is highly acceptable in terms of its cost and availability of components,?design and construction,operations, and troubleshooting features. It is concluded that the improvised logic gates simulator is at par in terms of standards on instructional devices based on the evaluation results of experts and is therefore recommended to be used in basic digital electronics instruction. The simulator is an innovative answer and an alternate solution to the scarcity of instructional materials and devices at Caraga State University Cabadbaran Campus.

Design and Implementation of an Efficient Reversible Comparator Using TR Gate

Reversible logic is a new emerging technology with many promising applications in optical information processing, low power (Complementary Metal Oxide Semiconductor) CMOS design, (De Oxy RiboNucleic Acid) DNA computing, etc. In industrial automation, comparators play an important role in segregating faulty patterns from good ones. In previous works, these comparators have been implemented with more number of reversible gates and computational complexity. All these comparators use propagation technique to compare the data. This will reduce the efficiency of the comparators. To overcome the problem, this paper proposes an efficient comparator using (Thapliyal Ranganathan) TR gate utilizing full subtraction and half subtraction algorithm which will improve the computation efficiency. The comparator design using half subtraction algorithm shows an improvement in terms of quantum cost. The comparator design using full subtraction algorithm shows effectiveness in reducing number of reversible gates required and garbage output.

支持Stage-Gate技术的一种设计管理方法研究

本文提出了将DSM矩阵和Stage -Gate技术相结合 ,应用于产品开发中的一种新方法。Stage -Gate方法能提升产品的开发成功率和缩短上市时间 ,将DSM技术应用于Stage -Gate中能对产品的设计结构提供一个清晰的认识并从信息依赖的观点把设计过程分解为各个阶段 ,有效地支持了Stage -Gate技术的发挥。

System-on-Chip Design Using High-Level Synthesis Tools

This paper addresses the challenges of System-on-Chip designs using High-Level Synthesis (HLS). HLS tools convert algorithms designed in C into hardware modules. This approach is a practical choice for developing complex applications. Nevertheless, certain hardware considerations are required when writing C applications for HLS tools. Hence, in order to demonstrate the fundamental hardware design concepts, a case studyis presented. Fast Fourier Transform (FFT) implementation in ANSI C is examined in order to explore the important design issues such as concurrency, data recurrences and memory accesses that need to be resolved before generating the hardware using HLS tools. There are additional language constraints that need to be addressed including use of pointers, recursion and floating point types.

基于红外摄像装置的Triniti呼吸门控系统的设计和性能验证

目的通过分析红外摄像装置Triniti呼吸门控系统和腹压带方式下采集的呼吸运动波形及4DCT影像一致性,验证Triniti呼吸门控系统的临床可行性。方法利用CIRS 18023-A呼吸运动模体及配套的CIRS Motion Control软件,导入仿真标准呼吸运动及真实患者的呼吸运动曲线,模拟人体肺部呼吸运动的周期、幅度、频率等,产生不同的呼吸运动模型,并分别用基于腹压带和Triniti呼吸门控系统2种呼吸运动信号触发CT扫描,分析2种装置触发下的4DCT影像一致性,最后根据Triniti系统追踪的呼吸运动,设置门控范围,实现门控治疗。结果2种呼吸运动信号探测装置采集到的呼吸运动波形曲线相关性>0.8(P<0.001),4DCT影像各时相感兴趣区域测量度差异性值为(0.065±0.069)cm,差异无统计学意义(P>0.05)。结论基于红外摄像装置的Triniti呼吸门控系统追踪呼吸精度高,可实现临床呼吸门控治疗,从而有效减少呼吸运动对放射治疗造成的影响。

基于相关性分离的逻辑电路敏感门定位算法

随着CMOS器件特征尺寸进入纳米量级,因高能粒子辐射等造成的电路失效问题日益严重,给电路可靠性带来严峻挑战。现阶段,准确评估集成电路可靠性,并以此为依据对电路进行容错加固,以提高电路系统可靠性变得刻不容缓。然而,由于逻辑电路中存在大量扇出重汇聚结构,由此引发的信号相关性导致可靠性评估与敏感单元定位面临困难。该文提出一种基于相关性分离的逻辑电路敏感门定位算法。先将电路划分为多个独立电路结构(ICS);以ICS为基本单元分析故障传播及信号相关性影响;再利用相关性分离后的电路模块和反向搜索算法精准定位逻辑电路敏感门单元;最后综合考虑面向输入向量空间的敏感门定位及针对性容错加固。实验结果表明,所提算法能准确、高效地定位逻辑电路敏感单元,适用于大规模及超大规模电路的可靠性评估与高效容错设计。

Molecular Docking Studies on Anticonvulsant Enaminones Inhibiting Voltage-Gated Sodium Channels

Epilepsy is described as the most common chronic brain disorder. A typical symptom of epilepsy results in uncontrolled convulsions caused by temporary excessive neuronal discharges. Although several new anticon-vulsants have been introduced, some types of seizures have still not been adequately controlled with these new and current therapies. There is an urgent need to develop new anticonvulsant drugs to control the many different types of seizures. Many studies have shown that the epilepsies involve more than one mechanism and therefore may be responsible for the various types of observed seizures. Recently reported studies have shown that a group of newly synthesized 6 Hz active anticonvulsant fluorinated N-benzamide enaminones exhibited selective inhibitions of voltage-gated sodium (Nav) channels. Nav channels are responsible for the initial inward currents during the depolarization phases of the action potential in excitable cells. The activation and opening of Nav channels result in the initial phases of action potentials. We hypothesize that there is an essential pharmacophore model for the interactions between these enaminones and the active sites of Nav channels. The research reported here is focused on molecular docking studies of the interactions that occur between the fluorinated N-benzamide enaminones and the Nav channels. These studies may open an avenue for designing anticonvulsant drugs by inhibiting Nav channels.

基于回波幅值信号的医用超声探头性能快速检测系统的研制

目的研制一套基于回波幅值信号的医用超声探头阵元快速检测系统,用以对超声探头性能进行评估与质量控制。方法运用现场可编程门阵列作为系统主控制芯片,以控制系统内部集成的电脉冲激励信号源,进而激励医用超声探头的阵元。阵元振动后产生超声波并在遇到空气后反射。基于超声脉冲回波测试方法,以回波幅值为主要检测参数,实现对超声探头阵元工作状态的检测与评估。结果选取同型号不同使用年限及故障状态的探头进行系统测试,并与所成超声图像进行对比:全新完好探头的回波幅值信号范围为550~575 mV,整体误差小于0.5 dB;使用1年的探头回波幅值信号范围为550~590 mV,较全新探头整体误差低0.6 dB左右;使用3年的探头回波幅值信号中存在十多个3 dB、6 dB及个别10 dB等不同程度的衰减;故障探头中存在三十多个成片连续衰减10 dB阵元。探头衰减位置及程度与所成超声图像缺损位置及程度相对应。结论本系统具有灵敏度高、稳定性好、操作简单快速等特点,在超声探头阵元性能评估方面具有很强的实际应用和推广价值。

汽车侧裙板数值成型分析及模具设计

汽车侧裙板长度约为1 m,宽度约为0.1 m,卡扣、加强筋、嵌件孔等复杂结构较多,属于大型细长复杂塑件。大型细长复杂塑件成型难度较大,需要采用数值仿真与模具设计相结合的方法,仿真、设计和验证交叉进行、相互渗透。根据产品的特点拟定了3种进浇方案,仿真结果表明,方案Ⅲ(9点进浇)翘曲变形量最小,其值为4.51 mm。通过验证方案Ⅲ的缩水性、填充时间、填充等值线、填充末端时间差及压力差等参数可知,方案Ⅲ填充均匀、末端压力一致、产品无缩水,表面无质量缺陷,为可行方案。根据方案Ⅲ进行模具设计,包括浇注系统、成型零部件、推出机构、冷却系统等。模具设计完毕后对冷却系统进行验证,结果表明,凸凹模的模温温差小于10℃,模温趋于一致,无翘曲变形风险。基于方案Ⅲ的模具设计可作为最终方案,为模具制造和生产提供方向。

Mechanism of single-event transient pulse quenching between dummy gate isolated logic nodes

As integrated circuits scale down in size, a single high-energy ion strike often affects multiple adjacent logic nodes.The so-called single-event transient（SET） pulse quenching induced by single-event charge sharing collection has been widely studied. In this paper, SET pulse quenching enhancement is found in dummy gate isolated adjacent logic nodes compared with that isolated by the common shallow trench isolation（STI）. The physical mechanism is studied in depth and this isolation technique is explored for SET mitigation in combinational standard cells. Three-dimensional（3D） technology computer-aided design simulation（TCAD） results show that this technique can achieve efficient SET mitigation.

Dual-Gate TFT-LCD抖动算法FRC研究与实现

在TFT-LCD驱动的关键设计技术中,抖动算法FRC(frame rate control)是一种重要的技术。它能够用6 bit source的输出来达到8 bit full color(16.7 M colors)的显示效果,这样可以降低数据传输率以降低功耗,同时可以节省源驱动(Source Driver,SD)芯片的面积。通过分析和实践,提出了针对用于平板电脑的Dual-Gate TFT-LCD屏和翻转方式,需要采用优化的FRC算法提高显示效果。在应用于平板电脑的dual-gate TFT-LCD屏的FRC方案中,分析了传统方案产生周期性竖线的原因,然后提出了改进方案,消除了竖线,提高了显示质量。最后,总结了FRC算法具体需要考虑的因素。

錾高水电站工程金属结构布置与设计

錾高水电站为叶尔羌河梯级开发的第二级引水式水电站,金属结构设备数量较多,分布分散,主要介绍錾高水电站工程金属结构的布置、启闭机的选型、闸门的结构设计及埋件设计的思路和方法。目前电站已安全2+a,金属结构设备安全可靠,对后续引水式电站开发建设,有一定的指导意义。

一种铝合金壳体压铸模具设计

通过对壳体零件的结构和成形性分析,重点对模具设计的主要环节进行了详细的分析与研究;分析设计了模具的分型面位置、浇注和排溢系统的结构以及推出机构,采用在侧面厚壁处多点浇口的结构形式;对模具的型芯、型腔做了具体的结构设计,采用型腔在定模、型芯在动模的普通两板式结构形式;并且型芯和型腔部分制作成活动镶件,便于修理、更换,模具结构简单、实用,完全满足模具的设计要求。