A Double High-Voltage p-LDMOS and Its Compatible Process for PDP Scan-Driver ICs

A high-voltage p-LDMOS（HV-pMOS） with field-oxide as gate dielectric and a RESURF drain drift region to undertake high gate-source voltage and drain-source voltage for the scan driver chip of plasma display panels （PDP） is purposed based on the epitaxial bipolar-CMOS-DMOS （BCD） process. The key considerations and parameters of the design are discussed：the thickness of gate dielectrics is 1mm and the area of the device is 80μm × 80μm. Only 18 photoetching steps are needed in the developed process,which is compatible with standard CMOS, bipolar, and VDMOS devices. The breakdown voltage of the HV-pMOS in the process control module （PCM） is more than 200V. The results are favorable for 170V PDP scan driver chips,which contribute to the competitive cost efficiency.

Analysis of non-uniform hetero-gate-dielectric dual-material control gate TFET for suppressing ambipolar nature and improving radio-frequency performance

A tunnel field-effect transistor(TFET) is proposed by combining various advantages together, such as non-uniform gate-oxide layer, hetero-gate-dielectric(HGD), and dual-material control-gate(DMCG) technology. The effects of the length of non-uniform gate-oxide layer and dual-material control-gate on the on-state, off-state, and ambipolar currents are investigated. In addition, radio-frequency performance is studied in terms of gain bandwidth product, cut-off frequency,transit time, and transconductance frequency product. Moreover, the length of non-uniform gate-oxide layer and dualmaterial control-gate are optimized to improve the on-off current ratio and radio-frequency performances as well as the suppression of ambipolar current. All results demonstrate that the proposed device not only suppresses ambipolar current but also improves radio-frequency performance compared with the conventional DMCG TFET, which makes the proposed device a better application prospect in the advanced integrated circuits.