Three kinds of coplanar waveguides （CPWs） are designed and fabricated on different silicon substrates---common low-resistivity silicon substrate （LRS）, LRS with a 3μm-thick silicon oxide interlayer, and high-resi...Three kinds of coplanar waveguides （CPWs） are designed and fabricated on different silicon substrates---common low-resistivity silicon substrate （LRS）, LRS with a 3μm-thick silicon oxide interlayer, and high-resistivity silicon （HRS） substrate. The results show that the microwave loss of a CPW on LRS is too high to be used, but it can be greatly reduced by adding a thick interlayer of silicon oxide between the CPW transmission lines and the LRS.A CPW directly on HRS shows a loss lower than 2dB/cm in the range of 0-26GHz and the process is simple,so HRS is a more suitable CPW substrate.展开更多
绝缘体上硅(Silicon on insulator,SOI)技术在200~400℃高温器件和集成电路方面有着广泛的应用前景,但对于沟道长度≤0.18μm的短沟道器件在200℃以上的高温下阈值电压漂移量达40%以上,漏电流达μA级,无法满足电路设计要求。本文研究了...绝缘体上硅(Silicon on insulator,SOI)技术在200~400℃高温器件和集成电路方面有着广泛的应用前景,但对于沟道长度≤0.18μm的短沟道器件在200℃以上的高温下阈值电压漂移量达40%以上,漏电流达μA级,无法满足电路设计要求。本文研究了基于0.15μm SOI工艺的1.5 V MOS器件电特性在高温下的退化机理和抑制方法,通过增加栅氧厚度、降低阱浓度、调整轻掺杂漏离子注入工艺等优化方法,实现了一种性能良好的短沟道高温SOI CMOS器件,在25~250℃温度范围内,该器件阈值电压漂移量<30%,饱和电流漂移量<15%,漏电流<1 nA/μm。此外采用仿真的方法分析了器件在高温下的漏区电势和电场的变化规律,将栅诱导漏极泄漏电流效应与器件高温漏电流关联起来,从而定性地解释了SOI短沟道器件高温漏电流退化的机理。展开更多
Objective The Gaoligongshan oblique collisional orogen is located in the southern section of the Hengduan Mountains, and belongs to one of the main Late Yanshanian-Himalayan oblique collisional orogens in the Sanjiang...Objective The Gaoligongshan oblique collisional orogen is located in the southern section of the Hengduan Mountains, and belongs to one of the main Late Yanshanian-Himalayan oblique collisional orogens in the Sanjiang area. Many researchers have studied the geology, geochemistry and geophysics of this region, and many research achievements have been obtained from deep geophysical exploration of the region, especially using the magnetotelluric （MT） sounding technique. However,展开更多
文摘Three kinds of coplanar waveguides （CPWs） are designed and fabricated on different silicon substrates---common low-resistivity silicon substrate （LRS）, LRS with a 3μm-thick silicon oxide interlayer, and high-resistivity silicon （HRS） substrate. The results show that the microwave loss of a CPW on LRS is too high to be used, but it can be greatly reduced by adding a thick interlayer of silicon oxide between the CPW transmission lines and the LRS.A CPW directly on HRS shows a loss lower than 2dB/cm in the range of 0-26GHz and the process is simple,so HRS is a more suitable CPW substrate.
文摘绝缘体上硅(Silicon on insulator,SOI)技术在200~400℃高温器件和集成电路方面有着广泛的应用前景,但对于沟道长度≤0.18μm的短沟道器件在200℃以上的高温下阈值电压漂移量达40%以上,漏电流达μA级,无法满足电路设计要求。本文研究了基于0.15μm SOI工艺的1.5 V MOS器件电特性在高温下的退化机理和抑制方法,通过增加栅氧厚度、降低阱浓度、调整轻掺杂漏离子注入工艺等优化方法,实现了一种性能良好的短沟道高温SOI CMOS器件,在25~250℃温度范围内,该器件阈值电压漂移量<30%,饱和电流漂移量<15%,漏电流<1 nA/μm。此外采用仿真的方法分析了器件在高温下的漏区电势和电场的变化规律,将栅诱导漏极泄漏电流效应与器件高温漏电流关联起来,从而定性地解释了SOI短沟道器件高温漏电流退化的机理。
基金the National Natural Science Foundation of China(grants No.41504061 and 41674078)the National Key Research and Development Project of China(grant No. 2016YFC0600302)
文摘Objective The Gaoligongshan oblique collisional orogen is located in the southern section of the Hengduan Mountains, and belongs to one of the main Late Yanshanian-Himalayan oblique collisional orogens in the Sanjiang area. Many researchers have studied the geology, geochemistry and geophysics of this region, and many research achievements have been obtained from deep geophysical exploration of the region, especially using the magnetotelluric （MT） sounding technique. However,
