期刊文献+
共找到2篇文章
< 1 >
每页显示 20 50 100
Integration and verification case of IP-core based system on chip design 被引量:3
1
作者 胡越黎 周谌 《Journal of Shanghai University(English Edition)》 CAS 2010年第5期349-353,共5页
In this paper, the design and verification process of an automobile-engine-fan control system on chip (SoC) are introduced. The SoC system, SHU-MV08, reuses four new intellectual property (IP) cores and the design... In this paper, the design and verification process of an automobile-engine-fan control system on chip (SoC) are introduced. The SoC system, SHU-MV08, reuses four new intellectual property (IP) cores and the design flow is accomplished with 0.35 btm chartered CMOS technology. Some special functions of IP cores, the detailed integration scheme of four IP cores, and the verification method of the entire SoC are presented. To settle the verification problems brought by analog IP cores, NanoSim based chip-level mixed-signal verification method is introduced. The verification time is greatly reduced and the first tape-out achieves success which proves the validity of our design. 展开更多
关键词 system on chip (SoC) intellectual property ip)-core integration VERIFICATION pulse width modulation (PWM)- analog digital converter (ADC) linkage running
下载PDF
Simulating and modeling the breakdown voltage in a semi-insulating GaAs P^+N junction diode
2
作者 A.Resfa Brahimi.R.Menezla M.Benchhima 《Journal of Semiconductors》 EI CAS CSCD 2014年第8期60-68,共9页
This work aims to determine the characteristic PN junction diode, subject to a reverse polarization, while I (breakdown voltage) of the inverse current in a GaAs specifying the parameters that influence the breakdow... This work aims to determine the characteristic PN junction diode, subject to a reverse polarization, while I (breakdown voltage) of the inverse current in a GaAs specifying the parameters that influence the breakdown voltage of the diode. In this work, we simulated the behavior of the ionization phenomenon by impact breakdown by avalanche of the PN junctions, subject to an inverse polarization. We will take into account both the trapping model in a stationary regime in the P+N structure using like material of basis the Ⅲ-Ⅴ compounds and mainly the GaAs semi-insulating in which the deep centers have in important densities. We are talking about the model of trapping in the space charge region (SCR) and that is the trap density donor and acceptor states. The carrier crossing the space charge region (SCR) of W thickness creates N electron-hole pairs: for every created pair, the electron and the hole are swept quickly by the electric field, each in an opposite direction, which comes back, according to an already accepted reasoning, to the crossing of the space charge region (SCR) by an electron or a hole. So the even N pair created by the initial particle provoke N2 ionizations and so forth. The study of the physical and electrical behaviour of semiconductors is based on the influence of the presence of deep centers on the characteristic I(V) current-tension, which requires the calculation of the electrostatic potential, the electric field, the integral of ionization, the density of the states traps, the diffusion current of minority in the regions (1) and (3), the current thermal generation in the region (2), the leakage current in the surface, and the breakdown voltage. 展开更多
关键词 the phenomenon of ionization by impact the integrals of ionizations In and ip the potential elec-trostatic and electric field variation of the trap state density Art the integral of ionization reversecurrent-breakdown voltage the current-breakdown voltage characteristics of the P+N junction diode
原文传递
上一页 1 下一页 到第
使用帮助 返回顶部