Mobility enhancement of strained GaSb p-channel metal-oxide-semiconductor field-effect transistors with biaxial compressive strain

Various biaxial compressive strained GaSb p-channel metal-oxide-semiconductor field-effect transistors （MOSFETs） are experimentally and theoretically investigated, The biaxial compressive strained GaSb MOSFETs show a high peak mobility of 638 cm2/V.s, which is 3.86 times of the extracted mobility of the fabricated GaSb MOSFETs without strain. Meanwhile, first principles calculations show that the hole effective mass of GaSb depends on the biaxial compressive strain. The biaxiai compressive strain brings a remarkable enhancement of the hole mobility caused by a significant reduction in the hole effective mass due to the modulation of the valence bands.

Modeling electric field of power metal-oxide-semiconductor field-effect transistor with dielectric trench based on Schwarz–Christoffel transformation

A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electric field at reversed blocking state has been studied. To analyze the electric field, the drift region is segmented into four regions, where the conformal mapping method based on Schwarz–Christoffel transformation has been applied. According to the analysis, the improvement in the electric field for using the low permittivity trench is mainly due to the two electric field peaks generated in the drift region around this dielectric trench. The analytical results of the electric field and the potential models are in good agreement with the simulation results.

Effect of depositing PCBM on perovskite-based metal–oxide–semiconductor field effect transistors

In this manuscript,the perovskite-based metal–oxide–semiconductor field effect transistors（MOSFETs） with phenylC61-butyric acid methylester（PCBM） layers are studied.The MOSFETs are fabricated on perovskites,and characterized by photoluminescence spectra（PL）,x-ray diffraction（XRD）,and x-ray photoelectron spectroscopy（XPS）.With PCBM layers,the current–voltage hysteresis phenomenon is effetely inhibited,and both the transfer and output current values increase.The band energy diagrams are proposed,which indicate that the electrons are transferred into the PCBM layer,resulting in the increase of photocurrent.The electron mobility and hole mobility are extracted from the transfer curves,which are about one order of magnitude as large as those of PCBM deposited,which is the reason why the electrons are transferred into the PCBM layer and the holes are still in the perovskites,and the effects of ionized impurity scattering on carrier transport become smaller.

Evaluation of a gate-first process for AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature

In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors （MOS- HFETs） were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance approximately 1.6 Ω.mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/A1Ox gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AIGaN/GaN MOS-HFETs.

Fabrication and characterization of the normally-off N-channel lateral 4H–SiC metal–oxide–semiconductor field-effect transistors

In this paper, the normally-off N-channel lateral 4H-SiC metal-oxide-semiconductor field-effect transistors （MOSF- FETs） have been fabricated and characterized. A sandwich- （nitridation-oxidation-nitridation） type process was used to grow the gate dielectric film to obtain high channel mobility. The interface properties of 4H-SiC/SiO2 were examined by the measurement of HF l-V, G-V, and C-V over a range of frequencies. The ideal C-V curve with little hysteresis and the frequency dispersion were observed. As a result, the interface state density near the conduction band edge of 4H-SiC was reduced to 2 x 1011 eV-l.cm-2, the breakdown field of the grown oxides was about 9.8 MV/cm, the median peak field- effect mobility is about 32.5 cm2.V-1 .s-1, and the maximum peak field-effect mobility of 38 cm2-V-1 .s-1 was achieved in fabricated lateral 4H-SiC MOSFFETs.

Stacked lateral double-diffused metal–oxide–semiconductor field effect transistor with enhanced depletion effect by surface substrate

A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.

Influences of fringing capacitance on threshold voltage and subthreshold swing of a GeOI metal-oxide-semiconductor field-effect transistor

Models of threshold voltage and subthreshold swing, including the fringing-capacitance effects between the gate electrode and the surface of the source/drain region, are proposed. The validity of the proposed models is confirmed by the good agreement between the simulated results and the experimental data. Based on the models, some factors impacting the threshold voltage and subthreshold swing of a GeOI metal-oxide-semiconductor field-effect transistor（MOSFET） are discussed in detail and it is found that there is an optimum thickness of gate oxide for definite dielectric constant of gate oxide to obtain the minimum subthreshold swing. As a result, it is shown that the fringing-capacitance effect of a shortchannel GeOI MOSFET cannot be ignored in calculating the threshold voltage and subthreshold swing.

GaSb p-channel metal-oxide-semiconductor field-effect transistor and its temperature dependent characteristics

GaSb p-channel metal-oxide-semiconductor field-effect transistors （MOSFETs） with an atomic layer deposited Al2O3 gate dielectric and a self-aligned Si-implanted source/drain are experimentally demonstrated. Temperature dependent electrical characteristics are investigated. Different electrical behaviors are observed in two temperature regions, and the un- derlying mechanisms are discussed. It is found that the reverse-bias pn junction leakage of the drain/substrate is the main component of the off-state drain leakage current, which is generation-current dominated in the low temperature regions and is diffusion-current dominated in the high temperature regions. Methods to further reduce the off-state drain leakage current are given.

The study on mechanism and model of negative bias temperature instability degradation in P-channel metal-oxide-semiconductor field-effect transistors

Negative Bias Temperature Instability （NBTI） has become one of the most serious reliability problems of metaloxide-semiconductor field-effect transistors （MOSFETs）. The degradation mechanism and model of NBTI are studied in this paper. From the experimental results, the exponential value 0.25-0.5 which represents the relation of NBTI degradation and stress time is obtained. Based on the experimental results and existing model, the reaction-diffusion model with H^＋ related species generated is deduced, and the exponent 0.5 is obtained. The results suggest that there should be H^＋ generated in the NBTI degradation. With the real time method, the degradation with an exponent 0.5 appears clearly in drain current shift during the first seconds of stress and then verifies that H^＋ generated during NBTI stress.

适用于SiC MOSFET的漏源电压积分自适应快速短路保护电路研究

SiC MOSFET因其高击穿电压、高开关速度、低导通损耗等性能优势而被广泛应用于各类电力电子变换器中。然而,由于其短路耐受时间仅为2~7μs,且随母线电压升高而缩短,快速可靠的短路保护电路已成为其推广应用的关键技术之一。为应对不同母线电压下的Si C MOSFET短路故障,文中提出一种基于漏源电压积分的自适应快速短路保护方法(drain-sourcevoltageintegration-basedadaptivefast short-circuit protection method,DSVI-AFSCPM),研究所提出的DSVI-AFSCPM在硬开关短路(hardswitchingfault,HSF)和负载短路(fault under load,FUL)条件下的保护性能,进而研究不同母线电压对DSVI-AFSCPM的作用机理。同时,探究Si CMOSFET工作温度对其响应速度的影响。最后,搭建实验平台,对所提出的DSVI-AFSCPM在发生硬开关短路和负载短路时不同母线电压、不同工作温度下的保护性能进行实验测试。实验结果表明,所提出的DSVI-AFSCPM在不同母线电压下具有良好的保护速度自适应性,即母线电压越高,短路保护速度越快,并且其响应速度受Si CMOSFET工作温度影响较小,两种短路工况下工作温度从25℃变化到125℃,短路保护时间变化不超过90 ns。因此,该文为Si CMOSFET在不同母线电压下的可靠使用提供一定技术支撑。

SiC MOSFET高温栅氧可靠性研究

碳化硅SiC(silicon carbide)具有优良的电学和热学特性,是一种前景广阔的宽禁带半导体材料。SiC材料制成的功率MOSFET(metal-oxide-semiconductor field-effect transistor)非常适合应用于大功率领域,而高温栅氧可靠性是大功率MOSFET最需要关注的特性之一。通过正压高温栅偏试验和负压高温栅偏试验对比了自研SiC MOSFET和国外同规格SiC MOSFET的高温栅氧可靠性。负压高温栅偏试验结果显示自研SiC MOSFET与国外SiC MOSFET的阈值电压偏移量基本相等,阈值电压偏移量百分比最大相差在4.52%左右。正压高温栅偏试验的结果显示自研SiC MOSFET的阈值电压偏移量较小,与国外SiC MOSFET相比,自研SiC MOSFET的阈值电压偏移量百分比最大相差11%。自研器件占优势的原因是在SiC/SiO2界面处引入了适量的氮元素,钝化界面缺陷的同时,减少了快界面态的产生,使总的界面态密度被降到最低。

SiC MOSFET驱动特性及器件国产化后的影响分析

碳化硅金属氧化物半导体场效应晶体管SiC MOSFET(silicon carbide metal-oxide-semiconductor field-effect transistor)作为一种新型、广泛应用的开关器件,在实际应用中具有更快的开关速度和更低的器件损耗,可以提高变换器的效率,体现更好的性能。针对SiC MOSFET驱动特性,分析寄生参数对其的影响;搭建双脉冲实验平台,分析栅源电压与SiC MOSFET导通时间的关系;针对现有国产SiC MOSFET存在的不足之处,基于搭建的实验平台及其他电源产品,对SiC MOSFET进行国产化器件替代后导通时间、驱动损耗及负压幅值变化的相关分析。

动态高温反偏应力下的SiC MOSFET测试平台及其退化机理研究

为研究SiC MOSFET在动态漏源应力下的退化机理,开发了一种具有dVds/dt可调功能、最高可达80 V/ns的动态反向偏置测试平台。针对商用SiC MOSFET进行动态高温反偏实验,讨论高电压变化率的动态漏源应力对SiC MOSFET电学特性的影响。实验结果显示,器件的阈值电压和体二极管正向导通电压增加,说明器件JFET区上方的栅氧层和体二极管可能发生了退化。通过Sentaurus TCAD分析了在高漏源电压及高电压变化率下平面栅型SiC MOSFET的薄弱位置,在栅氧层交界处和体二极管区域设置了空穴陷阱,模拟动态高温反偏对SiC MOSFET动静态参数的影响。

SiC MOSFET的质子单粒子效应

SiC金属氧化物半导体场效应晶体管(MOSFET)在深空探测领域具有广阔的应用前景,但空间质子引发的单粒子效应(SEE)对航天器稳定运行造成了严重威胁。对平面栅结构与非对称沟槽栅结构的SiC MOSFET进行了能量为70、100与200 MeV的质子辐照实验。实验结果表明,两种SiC MOSFET的单粒子烧毁(SEB)阈值电压均大于额定漏源电压的75%;SEB阈值电压随质子能量升高而降低。对两种器件进行辐照后栅应力测试发现,两种结构的器件由于沟道不同而对栅应力的响应存在差异;不同的质子能量会在栅极引入不同程度的辐射损伤,低能质子更容易在栅氧化层发生碰撞而引入氧化物潜在损伤。该研究可为揭示SiC MOSFET质子SEE机理和评估抗辐射能力提供参考。

SiC MOSFET器件栅氧可靠性研究综述

碳化硅金属氧化物半导体场效应晶体管SiC MOSFET(silicon carbide metal-oxide-semiconductor field effect transistor)因具有高压、高频、低导通损耗等优异特性而获得产业界广泛关注,但相比于硅基IGBT,SiC/SiO_(2)栅氧界面高缺陷密度引起的栅氧可靠性问题成为制约SiC MOSFET器件规模化应用的关键瓶颈。通过对近年来国内外SiC MOSFET栅氧可靠性研究成果的梳理和分析,阐述了当前栅氧可靠性问题的形成原因,归纳总结了各类常用的栅氧可靠性评估方法,并进行了比较分析,最后重点探讨了极端工况下SiC MOSFET栅氧可靠性及其提升技术的发展现状。

栅氧老化下SiC MOSFET开通瞬态栅极振荡特性研究

栅氧老化问题已成为制约碳化硅(SiC)金属半导体氧化物场效应管(metal oxide semiconductor field effect transistor,MOSFET)可靠性的关键因素,该文尝试利用SiC MOSFET高速开关在变换器中引起的高频开关振荡获取栅氧状态信息,重点研究栅氧老化对开通瞬态栅极高频振荡特性的影响。首先,分析SiC MOSFET栅氧老化机理及其对器件开通时间的影响。然后,建立开通瞬态栅极回路分阶段高频等效电路模型,揭示SiC MOSFET栅极开通振荡电流的形成机理和影响因素。最后,通过33 V高压栅偏加速老化实验进行验证。研究结果表明,随着栅氧老化程度的加深,SiC MOSFET阈值电压会逐渐增加而开通速度变慢,导致栅极开通振荡电流显著减小(约28%)。该文的工作有望为SiC MOSFET栅氧老化在线监测提供一种新的思路。

国产6.5 kV/400 A SiC MOSFET模块研制及电气特性研究

为满足当前新型电力系统中电能变换装备对器件高压、大容量、工作频率高、开关损耗低的需求,文中自主研制一款国内最高功率等级的6.5 kV/400 A碳化硅金属-氧化物-半导体场效应晶体管(metal-oxide-semiconductor field effect transistor,MOSFET)模块,并对其电气特性开展研究。首先,对模块的电路与封装结构进行设计,通过热仿真和阻抗测量手段,对所研制模块的热特性以及回路寄生参数进行分析;其次,对所研制的模块开展常温(25℃)及高温(150℃)下的静态、动态特性测量。测量结果表明,在常温、高温条件下,模块的阻断漏电流与栅源极漏电流微小,且开关损耗维持一致,具备较好的耐高温特性。同时,相较于同电压电流规格的硅绝缘栅双极型晶体管器件,模块开关损耗可降低72%以上。最后,搭建碳化硅器件连续运行工况实验平台,模拟器件在换流装备中的实际运行工况,对模块进行半桥正弦脉宽调制逆变连续运行实验。连续运行实验结果表明,该模块在电压3600 V、器件电流峰值280 A条件下连续运行1h无异常,初步验证模块具备工程应用能力。研究可为高压碳化硅MOSFET的研制及工程应用提供一定支撑。

基于有源箝位技术的SiC MOSFET串联均压有源驱动电路研究

功率器件串联技术是实现高压应用的有效途径之一,而串联应用的主要制约因素是串联器件之间的动态均压问题。该文针对不均压条件下串联器件的关断行为进行了理论分析,探究不均压的产生机理,提出一种基于有源箝位技术的碳化硅金属-氧化物半导体场效应晶体管串联均压有源驱动,其利用有源箝位电路检测串联器件之间的电压不均衡,并箝位电压尖峰,通过反馈控制器件栅极电荷及开关瞬态行为实现均压。该方案不存在不均压的调节周期,即使在交变负载下依然能在每一个开关周期的关断时间内实现均压控制。此外,该文还详细介绍所提出方案的电路原理和参数设计过程,并通过试验验证该方案均压控制效果的有效性。结果表明,所提出方案具有有源箝位电路拓展性强的特点;是独立于原有栅极驱动电路的辅助电路,适用性强;且控制电路结构简单,无需可编程逻辑芯片和额外的信号隔离。

基于栅极参考电压的SiC MOSFET栅极氧化物健康状态在线监测方法

栅极氧化物退化是限制SiC MOSFET进一步广泛应用的关键可靠性问题。在线监测能够实时获取栅极氧化物健康状态,是提升SiC MOSFET可靠性的重要手段,因此提出一种基于栅极参考电压的SiC MOSFET栅极氧化物健康状态在线监测方法,并详细介绍了利用栅极参考电压监测栅极氧化物健康状态的基本原理;提出一种栅极参考电压在线提取电路,经脉冲测试验证可以实现在线提取,经老化试验验证可以有效监测栅极氧化物健康状态。所提电路可以集成在栅极驱动中,不会显著增加系统复杂程度。

功率MOSFET在永磁同步电机控制中的影响和分析

在现代雷达控制系统中,伺服系统的转速稳定性和定点精度,直接影响到最终成像品质。文中针对伺服系统常用的永磁同步电机控制器中的功率器件金属-氧化物半导体场效应晶体管(MOSFET)展开研究,主要分析了MOSFET的米勒效应,介绍了MOSFET的电路模型和开通过程,分析了米勒平台电压的振荡原因和米勒效应对驱动电路的危害,并设计两种优化电路来抑制米勒效应。理论分析和实验结果表明,经过改进的驱动电路有效抑制了米勒效应产生的栅源脉冲电压尖峰。所设计电路已应用于20 kHz/1 kW永磁同步电机驱动器,有效提升了雷达伺服系统的环境适应性和稳定性。