A new method for designing sequential logic circuits is put forward in this paper. The method is that driv-ing condition for flip-flops is obtained by means of the transition firing condition of petri net and that des...A new method for designing sequential logic circuits is put forward in this paper. The method is that driv-ing condition for flip-flops is obtained by means of the transition firing condition of petri net and that designing asyn-chronous sequential circuits and synchronous sequential circuits can be unified.展开更多
带抑制弧的时延着色Petri网(Timed Colored Petri Nets with Inhibitor Arcs,TCPNIA)是一种描述实时嵌入式系统的模型。给出了从TCPNIA到时间自动机的结构化转换算法,以利用变迁冲突调解机制保证TCPNIA模型和转换后的时间自动机模型语...带抑制弧的时延着色Petri网(Timed Colored Petri Nets with Inhibitor Arcs,TCPNIA)是一种描述实时嵌入式系统的模型。给出了从TCPNIA到时间自动机的结构化转换算法,以利用变迁冲突调解机制保证TCPNIA模型和转换后的时间自动机模型语义等价;并给出了语义等价的证明和算法复杂度分析。层次化方法被用来提高模型检测的时间与空间效率。通过实际案例展示了该技术的应用和可行性。展开更多
文摘A new method for designing sequential logic circuits is put forward in this paper. The method is that driv-ing condition for flip-flops is obtained by means of the transition firing condition of petri net and that designing asyn-chronous sequential circuits and synchronous sequential circuits can be unified.
文摘带抑制弧的时延着色Petri网(Timed Colored Petri Nets with Inhibitor Arcs,TCPNIA)是一种描述实时嵌入式系统的模型。给出了从TCPNIA到时间自动机的结构化转换算法,以利用变迁冲突调解机制保证TCPNIA模型和转换后的时间自动机模型语义等价;并给出了语义等价的证明和算法复杂度分析。层次化方法被用来提高模型检测的时间与空间效率。通过实际案例展示了该技术的应用和可行性。