Sodium Nitrate Passivation as a Novel Insulation Technology for Soft Magnetic Composites

Sodium nitrate passivation has been developed as a new insulation technology for the production of FeSiAl soft magnetic composites (SMCs). In this work, the evolution of coating layers grown at different pH values is investigated involving analyses on their composition and microstructure. An insulation coating obtained using an acidic NaNO_(3) solution is found to contain Fe2O_(3), SiO_(2), Al2O_(3), and AlO(OH). The Fe2O_(3) transforms into Fe3O4 with weakened oxidizability of the NO_(3)– at an elevated pH, whereas an alkaline NaNO_(3) solution leads to the production of Al2O_(3), AlO(OH), and SiO_(2). Such growth is explained from both thermodynamic and kinetic perspectives and is correlated to the soft magnetic properties of the FeSiAl SMCs. Under tuned passivation conditions, optimal performance with an effective permeability of 97.2 and a core loss of 296.4 mW∙cm−3 is achieved at 50 kHz and 100 mT.

Energy-Saving Construction Technologies for Buildings

The development of the construction industry is shifting towards low-carbon construction,so it is necessary to improve and optimize related construction concepts,methods,and processes.By improving resource and energy control efficiency in building projects,minimizing construction waste,and reducing environmental impact,a foundation for the sustainable development of the industry can be established.This paper mainly analyzes the significance of low-carbon energy-saving construction technology and the control factors of construction,summarizes the status quo of the development of building energy-saving construction,and puts forward strategies for applying building energy-saving construction technology.These strategies serve to achieve low-carbon and energy-saving goals to promote the healthy development of energy-saving construction.

Drain and Source on Insulator MOSFETs Fabricated by Local SIMOX Technology

To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and tested.The low dose developed recently and low energy local SIMOX technology combined with the conventional CMOS technology is used to fabricate this kind of devices.Using this method,DSOI,SOI,and bulk MOSFETs are successfully integrated on a single chip.Test results show that the drain induced barrier lowering effect is suppressed.The breakdown voltage drain-to-source is greatly increased for DSOI devices due to the elimination of the floating-body effect.And the self-heating effect is also reduced and thus the reliability increased.At the same time,the advantage of SOI devices in speed is maintained.The technology makes it possible to integrate low voltage,low power,low speed SOI devices or high voltage,high power,high speed DSOI devices on one chip and it offers option for developing system-on-chip technology.

Relation between EL2 Groupand EL6 Group in SI-GaAs

The annealing behavior for EL2 and EL6 groups as dominant deep levels in semi-insulating GaAs was presented using Photo Induced Transient Spectroscopy measurement (PITS). During rapid thermal annealing, a relation was identified between EL2 group at 0.79 and 0.82 eV and EL6 group at 0.24, 0.27 and 0.82 eV below the conduction band. It is found that they may be close in structure, and belong to the EL2 and EL6 groups, respectively. In rapidly annealed samples, the quantity of all defects in the EL2 group increases, while that in the EL6 group decreases. However, by furnace annealing at 950°C for 5 h, some of the defects in the EL2 group break up, and the quantity of all defects in the EL6 group increases. It is suggested that the EL2 group and EL6 group are related in their microscopy structures. The relation between the two groups and origins was also discussed.

Paired interference 3-dB coupler based on SOI rib waveguides with anisotropic chemical wet etching

A 3-dB paired interference （PI） optical coupler in silicon-on-insulator （SOI） based on rib waveguides with trapezoidal cross section was designed with simulation by a modified finite-difference beam propagation method （FD-BPM） and fabricated by potassium hydroxide （KOH） anisotropic chemical wet etching. Theoretically, tolerances of width, length, and port distance are more than 1, 100, and 1 μm, respectively. Smooth interface was obtained with the propagation loss of 1.1 dB/cm at the wavelength of 1.55 μm. The coupler has a good uniformity of 0.2 dB and low excess loss of less than 2 dB.

Performance testing of log pile photonic crystal fast-fabricated by direct femtosecond laser writing

Great efforts has been made on fabricating photonic crystals （PCs） with photonic band gaps （PBGs） during the past decade. Three-dimensional （3D） log pile PC was fabricated fast by direct femtosecond laser writing in ORMOCER. Qualitative analysis of the errors of PC was investigated using the Image Pro Plus. Surface qualities such as bending, distortion, and surface roughness were shown, and the band gap in the infrared wavelength region was observed. Meanwhile, the theory was experimentally verified that the center of PBG diminishes as the crystal lattice period reduces. Therefore, it is possible to fabricate PCs whose band gap range is from the near-infrared to visible wave band.

Three-step lithography to the fabrication of vertically coupled micro-ring resonators in amorphous silicon-on-insulator

A simple method to fabricate vertically coupled micro-ring resonators in amorphous silicon-on-insulator is created by a three-step lithography process. First, the linear loss at 1.55 μm of the a-Si：H film is calculated to be 0.2 =k 0.05 dB/cm. Then, the bottom line waveguide of Su-8 with a flat top surface of 300 nm is created by etching. The thickness of Su-8 can easily be controlled by the etching time. Finally, by opening the window pattern and etching several layers, the first layer marks made by electron beam lithography are found with a 50 nm resolution, and the high quality of the micro-ring resonator is demonstrated.

A compact T-branch beam splitter based on anomalous reflection in two-dimensional photonic crystals

We project a compact T-branch beam splitter with a micron scale using a two-dimensional （2D） photonic crystal （PC）. For TE polarization, one light beam can be split into two sub-beams along opposite directions. The propagating directions of the two splitting beams remain unchanged when the incident angle varies in a certain range. Coupled-mode theory is used to analyze the truncating interface structure in order to investigate the energy loss of the splitter. Simulation results and theoretical analysis show that choosing an appropriate location of the truncating interface （PC-air interface） is very important for obtaining high efficiency due to the effect of defect modes. The most advantage of this kind of beam splitter is being fabricated and integrated easily.

Reverse current reduction of Ge photodiodes on Si without post-growth annealing

A new approach to reduce the reverse current of Ge pin photodiodes on Si is presented, in which an i-Si layer is inserted between Ge and top Si layers to reduce the electric field in the Ge layer. Without post- growth annealing, the reverse current density is reduced to -10 mA/cm^2 at -1 V, i.e., over one order of magnitude lower than that of the reference photodiode without i-Si layer. However, the responsivity of the photodiodes is not severely compromised. This lowered-reverse-current is explained by band-pinning at the i-Si/i-Ge interface. Barrier lowering mechanism induced by E-field is also discussed. The presented ＂non-thermal＂ approach to reduce reverse current should accelerate electronics-photonics convergence by using Oe on the Si complementary metal oxide semiconductor （CMOS） platform.

Non-blocking four-port optical router based on thermooptic silicon microrings

By using silicon-on-insulator(SOI) platform, 12 channel waveguides, and four parallel-coupling one-microring resonator routing elements, a non-blocking four-port optical router is proposed. Structure design and optimization are performed on the routing elements at 1 550 nm. At drop state with a power consumption of 0 m W, the insertion loss of the drop port is less than 1.12 d B, and the crosstalk between the two output ports is less than-28 d B; at through state with a power consumption of 22 m W, the insertion loss of the through port is less than 0.45 d B, and the crosstalk between the two output ports is below-21 d B. Routing topology and function are demonstrated for the four-port optical router. The router can work at nine non-blocking routing states using the thermo-optic(TO) effect of silicon for tuning the resonance of each switching element. Detailed characterizations are presented, including output spectrum, insertion loss, and crosstalk. According to the analysis on all the data links of the router, the insertion loss is within the range of 0.13—3.36 d B, and the crosstalk is less than-19.46 d B. The router can meet the need of large-scale optical network-on-chip(ONo C).

Design and fabrication of 25-channel 200 GHz AWG based on Si nanowire waveguides

A 25-channel 200 GHz arrayed waveguide grating （AWG） based on Si nanowire wavegnides is designed, simulated and fab- ricated. Transfer function method is used in the simulation and error analysis of AWG with width fluctuations. The 25-channel 200 GHz AWG exhibits central channel insertion loss of 6.7 dB, crosstalk of-13 dB, and central wavelength of 1 560.55 nm. The error analysis can explain the experimental results of 25-channel 200 GHz AWG well. By using deep ul- traviolet lithography （DUV） and inductively coupled plasma etching （ICP） technologies, the devices are fabricated on sili- con-on-insulator （SOI） substrate.

High-speed electrooptical VOA integrated in silicon-on-insulator

In this paper, we present simulation results of an electrooptical variable optical attenuator (VOA) integrated in silicon-on-insulator waveguide. The device is functionally based on free carriers absorption to achieve attenuation. Beam propagation method (BPM) and two-dimensional semiconductor device simulation tool PISCES-II were used to analyze the dc and transient characteristics of the device. The device has a response time (including rise time and fall time) less than 200 ns, much faster than the thermooptic and micro-electromechanical systems (MEMSs) based VOAs.

SOI thermo-optic modulator with fast response

Silicon-on-insulator (SOI) technology offers tremendous potential for integration of optoelectronic functions on a silicon wafer. In this letter, a 1 x 1 multimode interference (MMI) Mach-Zender interferometer (MZI) thermo-optic modulator fabricated by wet-etching method is demonstrated. The modulator has an extinction ratio of -11.0 dB, extra loss of -4.9 dB and power consumption of 420 mW. The response time is less than 30 us.

A fast SOI-based variable optical attenuator with a p-i-n structure with low polarization dependent loss

According to the plasma dispersion effect of silicon(Si),a silicon-on-insulator(SOI) based variable optical attenuator(VOA) with p-i-n lateral diode structure is demonstrated in this paper.A wire rib waveguide with sub-micrometer cross section is adopted.The device is only about 2 mm long.The power consumption of the VOA is 76.3 mW(0.67 V,113.9 mA),and due to the carrier absorption,the polarization dependent loss(PDL) is 0.1dB at 20dB attenuation.The raise time of the VOA is 34.5 ns,the fall time is 37 ns,and the response time is 71.5 ns.

Compact and broadband waveguide taper based on partial bandgap photonic crystals

Partial bandgap characteristics of parallelogram lattice photonic crystals are proposed to suppress the radiation modes in a compact dielectric waveguide taper so as to obtain high transmittance in a large wavelength range. Band structure of the photonic crystals shows that there exists a partial bandgap, The photonie crystals with partial bandgap are then used as the cladding of a waveguide taper to reduce the radiation loss efficiently. In comparison with the conventional dielectric taper and the complete bandgap photonic crystal taper, the partial bandgap photonic crystal taper has a high transmittance of above 85% with a wide band of 170 nm.

Polarization-independent grating coupler based on silicon-on-insulator

A novel and simple polarization independent grating couplers is designed and analyzed here, in which the TE polarization and the TM polarization light can be simultaneously coupled into a silicon waveguide along the same direction with high coupling efficiency. For the polarization-insensitive grating coupler, the coupling effi- ciencies of two orthogonal polarizations light are more than 60% at 1550 nm wavelength based on our optimized design parameters including grating period, etching height, filling factor, and so on. For TE mode the maximum efficiency is ~72% with more than 30 nm i dB bandwidth, simultaneously, for TM mode the maximum efficiency is 75.15% with 40 nm 1 dB bandwidth. Their corresponding wavelength difference between two polarizations＇ coupling peaks is demonstrated to be 35 nm. Polarization independent grating coupler designed here can be widelv used in optical communication and ontical information processing.

Resonant cavity enhanced photoluminescence of tensile strained Ge/SiGe quantum wells on silicon-on-insulator substrate

The tensile strained Ge/SiGe multiple quantum wells （MQWs） grown on a silicon-on-insulator （SOI） substrate were fabricated successfully by ultra-high chemical vapor deposition. Room temperature direct band photoluminescence from Ge quantum wells on SOI substrate is strongly modulated by Fabry-Perot cavity formed between the surface of Ge and the interface of buried SiO2. The photoluminescence peak intensity at 1.58 μm is enhanced by about 21 times compared with that from the Ge/SiGe quantum wells on Si substrate, and the full width at half maximum （FWHM） is significantly reduced. It is suggested that tensile strained Ge/SiGe multiple quantum wells are one of the promising materials for Si-based microcavity lijzht emitting devices.

Design and fabrication of the star coupler based on SOI material

A 1 x 25 star coupler is designed through calculation and beam propagation method (BPM) simulation. Improvement methods are focused on the design of the tapered waveguides in the device, improving the uniformity of the output light power of the star coupler. Utilizing the conventional Si process technology, the device is fabricated based on silicon-on-insulator (SOI) material. The test result shows that the star coupler has a perfect function of power splitting.