High performance integrated photonic circuit based on inverse design method

The basic indexes of all-optical integrated photonic circuits include high-density integration,ultrafast response and ultralow energy consumption.Traditional methods mainly adopt conventional micro/nano-structures.The overall size of the circuit is large,usually reaches hundreds of microns.Besides,it is difficult to balance the ultrafast response and ultra-low energy consumption problem,and the crosstalk between two traditional devices is difficult to overcome.Here,we propose and experimentally demonstrate an approach based on inverse design method to realize a high-density,ultrafast and ultra-low energy consumption integrated photonic circuit with two all-optical switches controlling the input states of an all-optical XOR logic gate.The feature size of the whole circuit is only 2.5μm×7μm,and that of a single device is 2μm×2μm.The distance between two adjacent devices is as small as 1.5μm,within wavelength magnitude scale.Theoretical response time of the circuit is 150 fs,and the threshold energy is within 10 fJ/bit.We have also considered the crosstalk problem.The circuit also realizes a function of identifying two-digit logic signal results.Our work provides a new idea for the design of ultrafast,ultra-low energy consumption all-optical devices and the implementation of high-density photonic integrated circuits.

Current Status of the Integrated Circuit Industry in China--IC Design Industry

China's IC industry has been flourishing in recent years,huge market demand together with government investments are the major driving forces for this development.The status and development momentum of the Chinese IC industry also attracted wide interest and attention of international counterparts.A group of domestic IC experts are invited by the JoMM to write a series of articles about China's IC industry,including the history,current status,development,and related government policies.Information in these articles is all from public data from recent years.The purpose of these articles is to enhance mutual understanding between the Chinese domestic IC industry and international IC ecosystem.The following article is the first one of this series,the status quo of China's IC industry.The IC industry chain is very long including design,manufacturing,special equipment,materials,packaging and testing.The article series are arranged in accordance with this order.

Microwave Integrated Circuit Design Handbook

作者:Reinmut K.Hoffmann(1984 IEEE微波奖获得者) 出版:Artech House公司(美国)1987年本书给出适于微波工程师和研究人员应用的有关MIC方面的基础技术、电性能和设计。侧重于电性能分析和设计,强调应用。对于每一种设计技术和应用均作出较清楚的叙述和完整的处理。本书尽量给出电路的物理描述,避免过于冗长的数学公式,内容包含对下列议题的详细评述与研讨:

Human blood plasma-based electronic integrated circuit amplifier configuration

Dear Editor： There is accumulating evidence that human blood electronic circuit components and their application circuits become more and more important to cyborg implant/engineering, man-machine interface, hu- man disease detection and healing, and artificial brain evolutionusl. Here, we report the first development of human plasma-based amplifier circuit in the dis- crete as well as integrated circuit （IC） configuration mode. Electrolytes in the human blood contain an enormous number of charge carriers such as positive and negative molecule/atom ions, which are electri- cally conducting media and therefore can be utilized for developing electronic circuit components and their application circuits. These electronic circuits obvi- ously have very high application impact potential towards bio-medical engineering and medical science and technology.

Concise Modeling of Amorphous Dual-Gate In-Ga-Zn-O Thin-Film Transistors for Integrated Circuit Designs

An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.

Matching processing in the design of integrated circuits

In the design of the integrated circuits, in order to ensure that the designed products conform to the presupposed parameters, while designing the schematic diagrams of the circuits, we should also strengthen the layout design. Especially in the design of the analog circuits, in the layout design, there is a high degree of matching requirement for the MOS. It will have an important impact on the performance of the chips. Based on this perspective, the author of this paper analyzes how to realize the matching of the three aspects of the MOS, the resistance and the capacitance in the integrated circuit design, in order to avoid the problem of the mismatch due to the arts and crafts.

Compact 16-channel integrated charge-sensitive preamplifier module for silicon strip detectors

In this study,a compact 16-channel integrated charge-sensitive preamplifier named the smart preamplifier(SPA)was developed to support the large-scale detector array used in modern nuclear physics experiments.Two types of SPA,namely SPA02 and SPA03(with external field effect transistor),have been manufactured to match silicon detectors with small and large capacitances,respectively.The characteristics of the SPA include fast response of typically less than 6 ns for pulse rising time and low equivalent noise of 1.5 keV at zero input capacitance.The energy sensitivity and pulse decay time can be easily adjusted by changing the feedback capacitance Cfand resistance Rfin various applications.A good energy resolution of 24.4 keV for 5.803-MeV alpha particles from 244 Cm was achieved using a small-sized Si-PIN detector;for the silicon strip detectors in the test with the alpha source,a typical energy resolution of 0.6–0.8%was achieved.The integrated SPA has been employed in several experiments of silicon strip detectors with hundreds of channels,and a good performance has been realized.

A novel voltage output integrated circuit temperature sensor

The novel integrated circuit (IC) temperature sensor presented in this paper works similarly as a two terminal Zener, has breakdown voltage directly proportional to Kelvin temperature at 10 mV/℃, with typical error of less than ±1.0℃ over a temperature range from -50℃ to +125℃. In addition to all the features that conventional IC temperature sensors have, the new device also has very low static power dissipation ( 0.5 mW ) , low output impedance ( less than 1Ω), excellent stability, high reproducibility, and high precision. The sensor's circuit design and layout are discussed in detail. Applications of the sensor include almost any type of temperature sensing over the range of -50℃-+125℃. The low impedance and linear output of the device make interfacing the readout or control circuitry especially easy. Due to the excellent performance and low cost of this sensor, more applications of the sensor over wide temperature range are expected.

Predicting stability of integrated circuit test equipment using upper side boundary values of normal distribution

In response to the growing complexity and performance of integrated circuit(IC),there is an urgent need to enhance the testing and stability of IC test equipment.A method was proposed to predict equipment stability using the upper side boundary value of normal distribution.Initially,the K-means clustering algorithm classifies and analyzes sample data.The accuracy of this boundary value is compared under two common confidence levels to select the optimal threshold.A range is then defined to categorize unqualified test data.Through experimental verification,the method achieves the purpose of measuring the stability of qualitative IC equipment through a deterministic threshold value and judging the stability of the equipment by comparing the number of unqualified data with the threshold value,which realizes the goal of long-term operation monitoring and stability analysis of IC test equipment.

3D IC系统架构概述

随着芯片制造工艺接近物理极限,使用多Die堆叠的三维集成电路(3D IC)已经成为延续摩尔定律的最佳途径之一。利用3D IC将芯片垂直堆叠集成,可以极大程度降低互联长度,提升互联带宽。详细介绍了一些常见的3D IC系统架构方案,说明了使用不同3D架构对于整体芯片系统在性能、功耗等方面的优势,也列举了在物理实现、封装测试、工艺能力等方面的挑战。最后综述了一些业内使用3D IC的典型产品,并介绍了这些产品的系统架构、典型参数、适用领域,以及使用3D IC后给产品带来的竞争力提升情况。针对业界现状,认为应该把握机遇,不惧挑战,实现弯道超车。

Challenges to Data-Path Physical Design Inside SOC

Previously,a single data-path stack was adequate for data-path chips,and the complexity and size of the data-path was comparatively small.As current data-path chips,such as system-on-a-chip (SOC),become more complex,multiple data-path stacks are required to implement the entire data-path.As more data-path stacks are integrated into SOC,data-path is becoming a critical part of the whole giga-scale integrated circuits (GSI) design.The traditional physical design methodology can not satisfy the data-path performance requirements,because it can not accommodate the data-path bit-sliced structure and the strict performance (such as timing,coupling,and crosstalk) constraints.Challenges in the data-path physical design are addressed.The fundamental problems and key technologies in data-path physical design are analysed.The corresponding researches and solutions in this research field are also discussed.

Top-Down Design of 260k Color TFT-LCD One-Chip Driver ICs

A top-down design methodology is proposed for the design of TFT-LCD one-chip driver ICs,and a 260k color, 176RGB× 220-dot TFT-LCD one-chip driver IC is successfully developed with silicon verification. This IC is a typical mixed-signal VLSI and is implemented by a 0.18μm HV CMOS process. The static power dissipation is about 5mW for 260k color display mode,and the settling time of the output grayscale voltages within 0.2% error is less than 26μs.

Trending IC design directions in 2022

For the non-stop demands for a better and smarter society, the number of electronic devices keeps increasing exponentially;and the computation power, communication data rate, smart sensing capability and intelligence are always not enough. Hardware supports software, while the integrated circuit(IC) is the core of hardware. In this long review paper, we summarize and discuss recent trending IC design directions and challenges, and try to give the readers big/cool pictures on each selected small/hot topics. We divide the trends into the following six categories, namely, 1) machine learning and artificial intelligence(AI) chips, 2) communication ICs, 3) data converters, 4) power converters, 5) imagers and range sensors, 6) emerging directions. Hope you find this paper useful for your future research and works.

Improved algorithm for RDO in JPEG2000 encoder and its IC design

An improved rate distortion optimization （RDO） algorithm in JPEG2000 is proposed. The proposed algorithm is suitable for integrated circuit （IC） implementation and can reduce 30% computational cost. A hardware architecture which includes control unit, memory, divider, data converter is also given to implement the algorithm. The circuit based on the improved algorithm is tested on FPGAs and integrated in a JPG2000 chip codec core.

Design, Fabrication, and Modeling of CMOS-Compatible Double Photodiode

A double photodiode (PD) constructed by p+/N-well junction and N-well/p-sub junction was designed and fabricated in a UMC 0.18-μm CMOS process. Based on the device structure and mechanism of double PD, a novel small-signal equivalent circuit model considering the carrier transit effect and the parasitic RC time constant was presented. By this model with complete electronic components, the double PD can be incorporated in a commercial circuit simulator. The component values were extracted by fitting the measured S-parameters using simulated annealing algorithm, and a good agreement between the measurement and the simulation results was achieved. © 2017, Tianjin University and Springer-Verlag Berlin Heidelberg.

基于横电磁波小室的IC辐射发射测试方法研究

集成电路(IC)的发展呈现出小型化和集成化的趋势,使得IC电磁辐射越来越强,准确测试出IC电磁辐射对于集成电路电磁兼容设计有重要意义。横电磁波(TEM)小室法是目前最常用的IC辐射测试方法,它使用方形测试板,测试四个角度(0°, 90°, 270°, 360°)的IC辐射值,然而IC电磁辐射具有角度效应,仅用四个角度无法准确测试出IC最大电磁辐射水平。文中基于TEM小室全波仿真模型,使用单根微带线,验证了角度对于IC辐射的影响。设计了基于STM32芯片的圆形测试板和方形测试板,利用TEM小室测试了不同角度、不同模式下的STM32芯片电磁辐射,测量结果证实了不同模式下圆形测试板的测试结果都要大于方形测试板,最大偏差达到16 d Bm,因此圆形测试板更能准确测出芯片的最大电磁辐射水平。

Analysis, Design, and Test of CDMA LFSR with Offset Mask Using Standard ICs

Hardware implementation of Linear Feedback Shift Register (LFSR) plays a great and very important role in communication systems, and in many security devices. In this paper, a design of LFSR with offset mask has been presented, for Direct Sequence Code Division Multiple Access (DS-CDMA) applications. Integrated electronic components have been used. An accessible model facilitating the synthesis on Printed Circuit Boards (PCB) and implementation on Field Programmable Gate Array (FPGA) is offered. In addition, a temporal and spectral analysis of the circuit is performed in order to validate the design. This latter facilitates the generation of pseudo-random codes based on LFSR and their integration into electronic systems.

3D-IC类同轴屏蔽型TSV的热力响应分析及结构优化

硅通孔(TSV)是解决三维集成电路(3D-IC)互连延迟问题的关键技术之一。TSV内部结构的变形失效,大多是由循环温度载荷产生的交变应力引起的。从信号完整性角度考虑,建立了接地TSV形状分别为圆柱形和椭圆柱形的类同轴屏蔽型TSV模型。基于最大Mises应力准则,对比分析了循环温度载荷对2种类同轴屏蔽型TSV热应力-应变的影响及最大应力点的主要失效形式。最后综合考虑TSV的几何参数对导体和凸块危险点Mises应力的影响,对椭圆柱形类同轴屏蔽型TSV结构进行多目标优化,将2种最优结构中2个危险点的Mises应力分别降低15.10%、17.18%和18.89%、6.74%。为提高TSV热可靠性的优化设计提供参考。

Design and Implementation of an Efficient Reversible Comparator Using TR Gate

Reversible logic is a new emerging technology with many promising applications in optical information processing, low power (Complementary Metal Oxide Semiconductor) CMOS design, (De Oxy RiboNucleic Acid) DNA computing, etc. In industrial automation, comparators play an important role in segregating faulty patterns from good ones. In previous works, these comparators have been implemented with more number of reversible gates and computational complexity. All these comparators use propagation technique to compare the data. This will reduce the efficiency of the comparators. To overcome the problem, this paper proposes an efficient comparator using (Thapliyal Ranganathan) TR gate utilizing full subtraction and half subtraction algorithm which will improve the computation efficiency. The comparator design using half subtraction algorithm shows an improvement in terms of quantum cost. The comparator design using full subtraction algorithm shows effectiveness in reducing number of reversible gates required and garbage output.

模拟集成电路设计课程实验项目驱动式教学改革

基于高校模拟集成电路设计课程实验项目分散且教学目标不明确,缺乏系统性和工程应用性,提出了项目驱动式教学改革。以与企业合作的工程项目为基础设立实验项目,并分解成由易及难的多个实验题目,分阶段、分步骤完成实验内容,最终完成模拟集成电路设计全流程实验,以“带隙基准电压源芯片全定制设计实验”为例阐述了实施步骤。课程实验项目采用驱动式教学加深了学生对课程内容的理解,有助于培养学生扎实的工程实践能力。