Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this ...Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.展开更多
As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and ...As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and microelectronic compatible fabrication characteristics makes it the most promising candidate in future advanced integrated circuits such as logical electronics,flexible electronics,and focal-plane photodetector.However,to realize the all-aspects application of MoS_(2),the research on obtaining high-quality and large-area films need to be continuously explored to promote its industrialization.Although the MoS_(2)grain size has already improved from several micrometers to sub-millimeters,the high-quality growth of wafer-scale MoS_(2)is still of great challenge.Herein,this review mainly focuses on the evolution of MoS_(2)by including chemical vapor deposition,metal–organic chemical vapor deposition,physical vapor deposition,and thermal conversion technology methods.The state-of-the-art research on the growth and optimization mechanism,including nucleation,orientation,grain,and defect engineering,is systematically summarized.Then,this review summarizes the wafer-scale application of MoS_(2)in a transistor,inverter,electronics,and photodetectors.Finally,the current challenges and future perspectives are outlined for the wafer-scale growth and application of MoS_(2).展开更多
Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical ...Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.展开更多
A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteri...A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.展开更多
Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches fo...Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches for integration of III–V gain media with silicon PICs.Similar approaches are also being considered for ferroelectrics to enable larger RF modulation bandwidths,higher linearity,lower optical loss integrated optical modulators on chip.In this paper,we review existing integration strategies ofⅢ-Ⅴmaterials and present a route towards hybrid integration of bothⅢ-Ⅴand ferroelectrics on the same chip.We show that adiabatic transformation of the optical mode between hybrid ferroelectric and silicon sections enables efficient transfer of optical modal energies for maximum overlap of the optical mode with the ferroelectric media,similar to approaches adopted to maximize optical overlap with the gain section,thereby reducing lasing thresholds for hybridⅢ-Ⅴintegration with silicon PICs.Preliminary designs are presented to enable a foundry compatible hybrid integration route of diverse functionalities on silicon PICs.展开更多
A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130?nm CMOS bulk Si and silicon-on-insulator (SOI) technologies. The effectiveness of linear energy transf...A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130?nm CMOS bulk Si and silicon-on-insulator (SOI) technologies. The effectiveness of linear energy transfer (LET) with a tilted ion beam at the 130?nm technology node is obtained. Tests of tilted angles θ=0 ° , 30 ° and 60 ° with respect to the normal direction are performed under heavy-ion Kr with certain power whose LET is about 40?MeVcm 2 /mg at normal incidence. Error numbers in D flip-flop chains are used to determine their upset sensitivity at different incidence angles. It is indicated that the effective LETs for SOI and bulk Si are not exactly in inverse proportion to cosθ , furthermore the effective LET for SOI is more closely in inverse proportion to cosθ compared to bulk Si, which are also the well known behavior. It is interesting that, if we design the sample in the dual interlocked storage cell approach, the effective LET in bulk Si will look like inversely proportional to cosθ very well, which is also specifically explained.展开更多
Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integra...Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.展开更多
An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used...An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.展开更多
Advances in developing transitions in microwave integrated circuits during the last ten years are reviewed. Some typical structures of transition are introduced. Transition structures can be classified into two basic ...Advances in developing transitions in microwave integrated circuits during the last ten years are reviewed. Some typical structures of transition are introduced. Transition structures can be classified into two basic types: one is transition between the same kind of transmission lines on different planes of a common substrate, the other transition between different types of transmission lines. Furthermore, future development of transition structures is discussed.展开更多
Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically....Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm^2, a small leakage current of 4.8 × 10^-8 A/cm^2 at 3 V, a high breakdown electric field of 8.61 MV/cm as well as acceptable voltage coefficients of capacitance (VCCs) of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.展开更多
Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular syn...Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular synthesis algorithm often only accounts for a specific function with a specific cell configuration.In this paper,we try to synthesize the programmable waveguide mesh to support multiple configurations with a more general digital signal processing platform.To show the feasibility of this technique,photonic waveguide meshes in different configurations(square,triangular and hexagonal meshes)are designed to realize optical signal interleaving with arbitrary duty cycles.The digital signal processing(DSP)approach offers an effective pathway for the establishment of a general design platform for the software-defined programmable photonic integrated circuits.The use of well-developed DSP techniques and algorithms establishes a link between optical and electrical signals and makes it convenient to realize the computer-aided design of optics–electronics hybrid systems.展开更多
The heterogeneous integration of photonic integrated circuits(PICs)with a diverse range of optoelectronic materials has emerged as a transformative approach,propelling photonic chips toward larger scales,superior perf...The heterogeneous integration of photonic integrated circuits(PICs)with a diverse range of optoelectronic materials has emerged as a transformative approach,propelling photonic chips toward larger scales,superior performance,and advanced integration levels.Notably,two-dimensional(2D)materials,such as graphene,transition metal dichalcogenides(TMDCs),black phosphorus(BP),and hexagonal boron nitride(hBN),exhibit remarkable device performance and integration capabilities,offering promising potential for large-scale implementation in PICs.In this paper,we first present a comprehensive review of recent progress,systematically categorizing the integration of photonic circuits with 2D materials based on their types while also emphasizing their unique advantages.Then,we discuss the integration approaches of 2D materials with PICs.We also summarize the technical challenges in the heterogeneous integration of 2D materials in photonics and envision their immense potential for future applications in PICs.展开更多
Wide-bandgap semiconductors exhibit much larger energybandgaps than traditional semiconductors such as silicon,rendering them very promising to be applied in the fields of electronics and optoelectronics.Prominent exa...Wide-bandgap semiconductors exhibit much larger energybandgaps than traditional semiconductors such as silicon,rendering them very promising to be applied in the fields of electronics and optoelectronics.Prominent examples of semiconductors include SiC,GaN,ZnO,and diamond,which exhibitdistinctive characteristics such as elevated mobility and thermalconductivity.These characteristics facilitate the operation of awide range of devices,including energy-efficient bipolar junctiontransistors(BJTs)and metal-oxide-semiconductor field-effecttransistors(MOSFETs),as well as high-frequency high-electronmobility transistors(HEMTs)and optoelectronic components suchas light-emitting diodes(LEDs)and lasers.These semiconductorsare used in building integrated circuits(ICs)to facilitate theoperation of power electronics,computer devices,RF systems,andother optoelectronic advancements.These breakthroughs includevarious applications such as imaging,optical communication,andsensing.Among them,the field of power electronics has witnessedtremendous progress in recent years with the development of widebandgap(WBG)semiconductor devices,which is capable ofswitching large currents and voltages rapidly with low losses.However,it has been proven challenging to integrate these deviceswith silicon complementary metal oxide semiconductor(CMOS)logic circuits required for complex control functions.The monolithic integration of silicon CMOS with WBG devices increases thecomplexity of fabricating monolithically integrated smart integrated circuits(ICs).This review article proposes implementingCMOS logic directly on the WBG platform as a solution.However,achieving the CMOS functionalities with the adoption of WBGmaterials still remains a significant hurdle.This article summarizesthe research progress in the fabrication of integrated circuitsadopting various WBG materials ranging from SiC to diamond,with the goal of building future smart power ICs.展开更多
As the manufacturing process of silicon-based integrated circuits(ICs)approaches its physical limit,the quantum effect of silicon-based field-effect transistors(FETs)has become increasingly evident.And the burgeoning ...As the manufacturing process of silicon-based integrated circuits(ICs)approaches its physical limit,the quantum effect of silicon-based field-effect transistors(FETs)has become increasingly evident.And the burgeoning carbon-based semiconductor technology has become one of the most disruptive technologies in the post-Moore era.As one-dimensional nanomaterials,carbon nanotubes(CNTs)are far superior to silicon at the same technology nodes of FETs because of their excellent electrical transport and scaling properties,rendering them the most competitive material in the next-generation ICs technology.However,certain challenges impede the industrialization of CNTs,particularly in terms of material preparation,which significantly hinders the development of CNT-based ICs.Focusing on CNT-based ICs technology,this review summarizes its main technical status,development trends,existing challenges,and future development directions.展开更多
Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optica...Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal-oxide-semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems.展开更多
Loss is inevitable for the optical system due to the absorption of materials, scattering caused by the defects, and surface roughness. In quantum optical circuits, the loss can not only reduce the intensity of the sig...Loss is inevitable for the optical system due to the absorption of materials, scattering caused by the defects, and surface roughness. In quantum optical circuits, the loss can not only reduce the intensity of the signal, but also affect the performance of quantum operations. In this work, we divide losses into unbalanced linear losses and shared common losses, and provide a detailed analysis on how loss affects the integrated linear optical quantum gates. It is found that the orthogonality of eigenmodes and the unitary phase relation of the coupled waveguide modes are destroyed by the loss. As a result, the fidelity of single-and two-qubit operations decreases significantly as the shared loss becomes comparable to the coupling strength. Our results are important for the investigation of large-scale photonic integrated quantum information processes.展开更多
Technologies are described for integrating multiple bandgaps and photonic crystal structures monolithically in a semiconductor chip. Practical devices examples include high power 980 nm pumps, 2×2 crosspoint swit...Technologies are described for integrating multiple bandgaps and photonic crystal structures monolithically in a semiconductor chip. Practical devices examples include high power 980 nm pumps, 2×2 crosspoint switches and lasers modelocked at THz frequencies.展开更多
A novel integration-based yield estimation method is developed for yield optimization of integrated circuits.This method tries to integrate the joint probability density function on the acceptability region directly. ...A novel integration-based yield estimation method is developed for yield optimization of integrated circuits.This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal,the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation(BCT).In order to reduce the estimation variances of the model parameters of the density function,orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations.The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed.Two yield estimation examples,a fourth-order OTA-C filter and a three-dimensional(3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values.Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases.Therefore,our method is more suitable for parametric yield optimization.展开更多
Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presented to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical p...Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presented to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical performance expressions, operating point driven (OPD) metamodels of MOSFETs are introduced to capture the circuit's characteristics precisely. In the algorithm of metamodel construction, radial basis functions are adopted to interpolate the scattered multivariate data obtained from a well tailored data sampling scheme designed for MOSFETs. The OPD metamodels can be used to automatically bias the circuit at a specific DC operating point. Analytical-based performance expressions composed by the OPD metamodels show obvious improvement for most small-signal performances compared with simulation-based models. Both operating-point variables and transistor dimensions can be optimized in our nesting-loop optimization formulation to maximize design flexibility. The method is successfully applied to a low-voltage low-power amplifier.展开更多
基金funded by the National Nature Science Foundation of China(Grant Nos.52175509 and 52130504)National Key Research and Development Program of China(2017YFF0204705)2021 Postdoctoral Innovation Research Plan of Hubei Province(0106100226)。
文摘Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.
基金financially the National Natural Science Foundation of China(52002254,52272160)Sichuan Science and Technology Foundation(2020YJ0262,2021YFH0127,2022YFSY0045,2022YFH0083 and 23SYSX0060)+3 种基金the Chunhui plan of Ministry of Education,Fundamental Research Funds for the Central Universities,China(YJ201893)the Open-Foundation of Key Laboratory of Laser Device Technology,China North Industries Group Corporation Limited(Grant No.KLLDT202104)the foundation of the State Key Laboratory of Solidification Processing in NWPU(No.SKLSP202210)the 2035-Plan of Sichuan University。
文摘As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and microelectronic compatible fabrication characteristics makes it the most promising candidate in future advanced integrated circuits such as logical electronics,flexible electronics,and focal-plane photodetector.However,to realize the all-aspects application of MoS_(2),the research on obtaining high-quality and large-area films need to be continuously explored to promote its industrialization.Although the MoS_(2)grain size has already improved from several micrometers to sub-millimeters,the high-quality growth of wafer-scale MoS_(2)is still of great challenge.Herein,this review mainly focuses on the evolution of MoS_(2)by including chemical vapor deposition,metal–organic chemical vapor deposition,physical vapor deposition,and thermal conversion technology methods.The state-of-the-art research on the growth and optimization mechanism,including nucleation,orientation,grain,and defect engineering,is systematically summarized.Then,this review summarizes the wafer-scale application of MoS_(2)in a transistor,inverter,electronics,and photodetectors.Finally,the current challenges and future perspectives are outlined for the wafer-scale growth and application of MoS_(2).
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61131001,61322405,61204044,61376039,and 61334003)
文摘Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.
基金Supported by the National High-Technology Research and Development Program of China under Grant No 2011AA010203the National Basic Research Program of China under Grant Nos 2011CB201704 and 2010CB327502the National Natural Science Foundation of China under Grant Nos 61434006 and 61106074
文摘A 330-500 GHz zero-biased broadband monolithic integrated tripler is reported. The measured results show that the maximum efficiency and the maximum output power are 2% and 194μW at 348 GHz. The saturation characteristic test shows that the output i dB compression point is about -8.5 dBm at 334 GHz and the maximum efficiency is obtained at the point, which is slightly below the 1 dB compression point. Compared with the conventional hybrid integrated circuit, a major advantage of the monolithic integrated circuit is the significant improvement of reliability and consistency. In this work, a terahertz monolithic frequency multiplier at this band is designed and fabricated.
文摘Hybrid integration ofⅢ-Ⅴand ferroelectric materials is being broadly adopted to enhance functionalities in silicon photonic integrated circuits(PICs).Bonding and transfer printing have been the popular approaches for integration of III–V gain media with silicon PICs.Similar approaches are also being considered for ferroelectrics to enable larger RF modulation bandwidths,higher linearity,lower optical loss integrated optical modulators on chip.In this paper,we review existing integration strategies ofⅢ-Ⅴmaterials and present a route towards hybrid integration of bothⅢ-Ⅴand ferroelectrics on the same chip.We show that adiabatic transformation of the optical mode between hybrid ferroelectric and silicon sections enables efficient transfer of optical modal energies for maximum overlap of the optical mode with the ferroelectric media,similar to approaches adopted to maximize optical overlap with the gain section,thereby reducing lasing thresholds for hybridⅢ-Ⅴintegration with silicon PICs.Preliminary designs are presented to enable a foundry compatible hybrid integration route of diverse functionalities on silicon PICs.
基金Supported by the Key Laboratory of Microsatellites,Chinese Academy of Sciences
文摘A heavy-ion irradiation experiment is studied in digital storage cells with different design approaches in 130?nm CMOS bulk Si and silicon-on-insulator (SOI) technologies. The effectiveness of linear energy transfer (LET) with a tilted ion beam at the 130?nm technology node is obtained. Tests of tilted angles θ=0 ° , 30 ° and 60 ° with respect to the normal direction are performed under heavy-ion Kr with certain power whose LET is about 40?MeVcm 2 /mg at normal incidence. Error numbers in D flip-flop chains are used to determine their upset sensitivity at different incidence angles. It is indicated that the effective LETs for SOI and bulk Si are not exactly in inverse proportion to cosθ , furthermore the effective LET for SOI is more closely in inverse proportion to cosθ compared to bulk Si, which are also the well known behavior. It is interesting that, if we design the sample in the dual interlocked storage cell approach, the effective LET in bulk Si will look like inversely proportional to cosθ very well, which is also specifically explained.
文摘Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.
文摘Submicron CMOS IC technology, including triple layer resist lithography technology, RIE, LDD, Titanium Salicide, shallow junction, thin gate oxide, no bird's beak isolation and channel's multiple implantation doping technology have been developed. 0.50μm. CMOS integrated circuits have been fabricated using this submicron CMOS process.
文摘An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.
基金Supported by the Specialized Research Fund for the Doctoral Program of Higher Education (No.20010614003) and the Key Project of Chinese Ministry of Education(No.104166).
文摘Advances in developing transitions in microwave integrated circuits during the last ten years are reviewed. Some typical structures of transition are introduced. Transition structures can be classified into two basic types: one is transition between the same kind of transmission lines on different planes of a common substrate, the other transition between different types of transmission lines. Furthermore, future development of transition structures is discussed.
基金Project supported by the National Natural Science Foundation of China (Grant No 90607023), Shanghai Pujiang Program (Grant No 05PJ14017), SRF for R0CS, SEM, and the Micro/Nano-electronics Science and Technology Innovation Platform (985) and the Ministry of Education of China in the International Research Training Group "Materials and Concepts for Advanced Interconnects
文摘Metal-insulator-metal (MIM) capacitors with atomic-layer-deposited Al2O3 dielectric and reactively sputtered TaN electrodes in application to radio frequency integrated circuits have been characterized electrically. The capacitors exhibit a high density of about 6.05 fF/μm^2, a small leakage current of 4.8 × 10^-8 A/cm^2 at 3 V, a high breakdown electric field of 8.61 MV/cm as well as acceptable voltage coefficients of capacitance (VCCs) of 795 ppm/V2 and 268ppm/V at 1 MHz. The observed properties should be attributed to high-quality Al2O3 film and chemically stable TaN electrodes. Further, a logarithmically linear relationship between quadratic VCC and frequency is observed due to the change of relaxation time with carrier mobility in the dielectric. The conduction mechanism in the high field ranges is dominated by the Poole-Frenkel emission, and the leakage current in the low field ranges is likely to be associated with trap-assisted tunnelling. Meanwhile, the Al2O3 dielectric presents charge trapping under low voltage stresses, and defect generation under high voltage stresses, and it has a hard-breakdown performance.
文摘Programmable photonic waveguide meshes can be programmed into many different circuit topologies and thereby provide a variety of functions.Due to the complexity of the signal routing in a general mesh,a particular synthesis algorithm often only accounts for a specific function with a specific cell configuration.In this paper,we try to synthesize the programmable waveguide mesh to support multiple configurations with a more general digital signal processing platform.To show the feasibility of this technique,photonic waveguide meshes in different configurations(square,triangular and hexagonal meshes)are designed to realize optical signal interleaving with arbitrary duty cycles.The digital signal processing(DSP)approach offers an effective pathway for the establishment of a general design platform for the software-defined programmable photonic integrated circuits.The use of well-developed DSP techniques and algorithms establishes a link between optical and electrical signals and makes it convenient to realize the computer-aided design of optics–electronics hybrid systems.
文摘The heterogeneous integration of photonic integrated circuits(PICs)with a diverse range of optoelectronic materials has emerged as a transformative approach,propelling photonic chips toward larger scales,superior performance,and advanced integration levels.Notably,two-dimensional(2D)materials,such as graphene,transition metal dichalcogenides(TMDCs),black phosphorus(BP),and hexagonal boron nitride(hBN),exhibit remarkable device performance and integration capabilities,offering promising potential for large-scale implementation in PICs.In this paper,we first present a comprehensive review of recent progress,systematically categorizing the integration of photonic circuits with 2D materials based on their types while also emphasizing their unique advantages.Then,we discuss the integration approaches of 2D materials with PICs.We also summarize the technical challenges in the heterogeneous integration of 2D materials in photonics and envision their immense potential for future applications in PICs.
基金supported by KAUST BaselineFund:BAS/1/1664-01-01,KAUST Near-term Grand Challenge Fund:REI/1/4999-01-01,KAUST Impact Acceleration Fund:REI/1/5124-01-01.
文摘Wide-bandgap semiconductors exhibit much larger energybandgaps than traditional semiconductors such as silicon,rendering them very promising to be applied in the fields of electronics and optoelectronics.Prominent examples of semiconductors include SiC,GaN,ZnO,and diamond,which exhibitdistinctive characteristics such as elevated mobility and thermalconductivity.These characteristics facilitate the operation of awide range of devices,including energy-efficient bipolar junctiontransistors(BJTs)and metal-oxide-semiconductor field-effecttransistors(MOSFETs),as well as high-frequency high-electronmobility transistors(HEMTs)and optoelectronic components suchas light-emitting diodes(LEDs)and lasers.These semiconductorsare used in building integrated circuits(ICs)to facilitate theoperation of power electronics,computer devices,RF systems,andother optoelectronic advancements.These breakthroughs includevarious applications such as imaging,optical communication,andsensing.Among them,the field of power electronics has witnessedtremendous progress in recent years with the development of widebandgap(WBG)semiconductor devices,which is capable ofswitching large currents and voltages rapidly with low losses.However,it has been proven challenging to integrate these deviceswith silicon complementary metal oxide semiconductor(CMOS)logic circuits required for complex control functions.The monolithic integration of silicon CMOS with WBG devices increases thecomplexity of fabricating monolithically integrated smart integrated circuits(ICs).This review article proposes implementingCMOS logic directly on the WBG platform as a solution.However,achieving the CMOS functionalities with the adoption of WBGmaterials still remains a significant hurdle.This article summarizesthe research progress in the fabrication of integrated circuitsadopting various WBG materials ranging from SiC to diamond,with the goal of building future smart power ICs.
基金supported by National Natural Science Foundation of China(Grant No.52022078)Shaanxi Provincial Key Research and Development Program(Grant No.2021ZDLGY10-02,2019ZDLGY01-09)。
文摘As the manufacturing process of silicon-based integrated circuits(ICs)approaches its physical limit,the quantum effect of silicon-based field-effect transistors(FETs)has become increasingly evident.And the burgeoning carbon-based semiconductor technology has become one of the most disruptive technologies in the post-Moore era.As one-dimensional nanomaterials,carbon nanotubes(CNTs)are far superior to silicon at the same technology nodes of FETs because of their excellent electrical transport and scaling properties,rendering them the most competitive material in the next-generation ICs technology.However,certain challenges impede the industrialization of CNTs,particularly in terms of material preparation,which significantly hinders the development of CNT-based ICs.Focusing on CNT-based ICs technology,this review summarizes its main technical status,development trends,existing challenges,and future development directions.
基金supported by the National Basic Research Program of China(No.2011CBA00608)the National Natural Science Foundation of China(Nos.61178051,61321063,61335010,61178048,61275169)the National High Technology Research and Development Program of China(Nos.2013AA013602,2013AA031903,2013AA032204)
文摘Silicon photonics is an emerging competitive solution for next-generation scalable data communications in different application areas as high-speed data communication is constrained by electrical interconnects. Optical interconnects based on silicon photonics can be used in intra/inter-chip interconnects, board-to-board interconnects, short-reach communications in datacenters, supercomputers and long-haul optical transmissions. In this paper, we present an overview of recent progress in silicon optoelectronic devices and optoelectronic integrated circuits (OEICs) based on a complementary metal-oxide-semiconductor-compatible process, and focus on our research contributions. The silicon optoelectronic devices and OEICs show good characteristics, which are expected to benefit several application domains, including communication, sensing, computing and nonlinear systems.
基金supported by the National Natural Science Foundation of China(Nos.11374289,61590932,and 61505195)the National Key R&D Program(Nos.2016YFA0301700 and 2016YFA0301300)+2 种基金the Innovation Funds from the Chinese Academy of Sciences(No.60921091)the Fundamental Research Funds for the Central Universitiesthe Open Fund of the State Key Laboratory on Integrated Optoelectronics(IOSKL2015KF12)
文摘Loss is inevitable for the optical system due to the absorption of materials, scattering caused by the defects, and surface roughness. In quantum optical circuits, the loss can not only reduce the intensity of the signal, but also affect the performance of quantum operations. In this work, we divide losses into unbalanced linear losses and shared common losses, and provide a detailed analysis on how loss affects the integrated linear optical quantum gates. It is found that the orthogonality of eigenmodes and the unitary phase relation of the coupled waveguide modes are destroyed by the loss. As a result, the fidelity of single-and two-qubit operations decreases significantly as the shared loss becomes comparable to the coupling strength. Our results are important for the investigation of large-scale photonic integrated quantum information processes.
文摘Technologies are described for integrating multiple bandgaps and photonic crystal structures monolithically in a semiconductor chip. Practical devices examples include high power 980 nm pumps, 2×2 crosspoint switches and lasers modelocked at THz frequencies.
文摘A novel integration-based yield estimation method is developed for yield optimization of integrated circuits.This method tries to integrate the joint probability density function on the acceptability region directly. To achieve this goal,the simulated performance data of unknown distribution should be converted to follow a multivariate normal distribution by using Box-Cox transformation(BCT).In order to reduce the estimation variances of the model parameters of the density function,orthogonal array-based modified Latin hypercube sampling (OA-MLHS) is presented to generate samples in the disturbance space during simulations.The principle of variance reduction of model parameters estimation through OA-MLHS together with BCT is also discussed.Two yield estimation examples,a fourth-order OTA-C filter and a three-dimensional(3D) quadratic function are used for comparison of our method with Monte Carlo based methods including Latin hypercube sampling and importance sampling under several combinations of sample sizes and yield values.Extensive simulations show that our method is superior to other methods with respect to accuracy and efficiency under all of the given cases.Therefore,our method is more suitable for parametric yield optimization.
文摘Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presented to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical performance expressions, operating point driven (OPD) metamodels of MOSFETs are introduced to capture the circuit's characteristics precisely. In the algorithm of metamodel construction, radial basis functions are adopted to interpolate the scattered multivariate data obtained from a well tailored data sampling scheme designed for MOSFETs. The OPD metamodels can be used to automatically bias the circuit at a specific DC operating point. Analytical-based performance expressions composed by the OPD metamodels show obvious improvement for most small-signal performances compared with simulation-based models. Both operating-point variables and transistor dimensions can be optimized in our nesting-loop optimization formulation to maximize design flexibility. The method is successfully applied to a low-voltage low-power amplifier.