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A New Method for Optimizing Layout Parameter ofan Integrated On-Chip Inductor in CMOSRF IC's 被引量:1
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作者 李力南 钱鹤 《Journal of Semiconductors》 CSCD 北大核心 2000年第12期1157-1163,共7页
Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter.... Analyzing the influence on Q factor, which was caused by the parasitic effect in a CMOS RF on chip integrated inductor, a concise method to increase the Q factor has been obtained when optimizing the layout parameter. Using this method, the Q factor of 7.9 can be achieved in a 5nH inductor (operating frequency is 2GHz) while the errors in inductance are less than 0.5% compared with the aimed values. It is proved by experiments that this method can guarantee the sufficient accuracy but require less computation time. Therefore, it is of great use for the design of the inductor in CMOS RF IC’s. 展开更多
关键词 CMOS RF IC integrated on chip inductor Q-factor
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