A 10GHz LC Voltage-Controlled Oscillator in 0.25μm CMOS

A monolithic 10GHz LC voltage-controlled oscillator （VCO） is implemented in standard 0.25μm CMOS technology. The VCO adopts an optimized symmetric circular inductor with center-tap, an accumulation-mode MOS （A-MOS） varactor in series with a passive metal-isolator-metal capacitor （MIM-CAP） and a tail current source with an LC filter to operate with high-frequency and low-noise resulting in - 103.2dBc/Hz at 1MHz offset from carrier frequency of 10.2GHz and approximately 11.5% tuning range. With a 3.3V supply voltage, the core circuit consumes 9.9mW. The chip area is 0.67mm × 0.58mm.

Low Phase Noise LC-VCO with Multi-stage Filtering

A low-phase-noise CMOS voltage-controlled oscillator( VCO) with zero-bias scheme and multi-stage filtering is presented. Sharing ground w ith fully integrated loop filter,the PM OS-only VCO achieves a zero-bias scheme,w hich prevents tuning line noise from disturbing VCO output common-mode voltage and hence minimizes phase noise caused by nonlinear C-V characteristic of varactors. Top-biased current source is optimized by multi-stage filtering to reduce 1/f flicker and thermal noise. Fabricated in TSM C 180 nm CM OS process,the proposed VCO exhibits a measured oscillation frequency of 0.85 ~ 1.45 GHz,w ith a phase noise of-121.8 ^-131.3 dBc/Hz @ 1MHz offset over the w hole band. Pow er consumption is 3.8 ~ 6.3 mW from a 1.8 V supply.

Design of 10 GHz eight-phase voltage controlled oscillator in 90nm CMOS

A novel 10 GHz eight-phase voltage-controlled oscillator （VCO） architecture applied in clock and data recovery （CDR） circuit for 40 Gbit/s optical communications system is proposed. Compared with the traditional eight-phase oscillator, a new ring CL ladder filter structure with four inductors is proposed. The VCO is designed and fabricated in IBM 90 nm complementary metal-oxide-semiconductor transistor （CMOS） technology. Measurement results show the tuning range is 9.2 GHz-11.0 GHz and the phase noise of - 108.85 dBc/Hz at 1 MHz offset from the carrier frequency of 10 GHz. The chip area of VCO is 500 μm × 685 μm and the power dissipation is 17.4 mW with the 1.2 V supply voltage.

Experimental Research on Electromagnetic Radiation in Inductive Energy Storage Accelerator

There exists strong electromagnetic radiation in inductive energy storage accelerators.It can destroy a measuring device at a distance.By repeated experiments,we found that it is a wide-spectrum electromagnetic wave with a main frequency of 75MHz.The effector such as coaxial transmission line is effected strongly in short distance.The current in the coaxial transmission line can be measured in Rogowski coils.The strength of field in it is about 500V/m and the peak current is 217mA.The radiation source may be LC oscillating or electric exploding opening switch. Through the experimental research,we think it probably may be caused by the LC oscillating in the circuit when the switches conduct.And its strength is correlated to current change ratio.The change rate in secondary circuit is stronger than in primary circuit.So the radiation generated in secondary circuit is stronger than in primary circuit.It may be a reference for further research in inductive energy storage accelerators and shielding electromagnetic disturbing.

A power scalable PLL frequency synthesizer for high-speed Δ–Σ ADC

A 35-130 MHz/300-360 MHz phase-locked loop frequency synthesizer for △-∑ analog-to-digital con- verter （ADC） in 65 nm CMOS is presented. The frequency synthesizer can work in low phase-noise mode （300-360 MHz） or in low-power mode （35-130 MHz） to satisfy the ADC＇s requirements. To switch between these two modes, a high frequency GHz LC VCO followed by a divided-by-four frequency divider and a low frequency ring VCO followed by a divided-by-two frequency divider are integrated on-chip. The measured results show that the fre- quency synthesizer achieves a phase-noise of-132 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 1.12 ps with 1.74 mW power consumption from a 1.2 V power supply in low phase-noise mode. In low-power mode, the frequency synthesizer achieves a phase-noise of-112 dBc/Hz at 1 MHz offset and an integrated RMS jitter of 7.23 ps with 0.92 mW power consumption from a 1.2 V power supply.

A 220–1100 MHz low phase-noise frequency synthesizer with wide-band VCO and selectable I/Q divider

This paper presents a low phase-noise fractional-N frequency synthesizer which provides an inphase/quadrature-phase（I/Q） signal over a frequency range of 220–1100 MHz for wireless networks of industrial automation（WIA） applications. Two techniques are proposed to achieve the wide range. First, a 1.4–2.2 GHz ultralow gain voltage-controlled oscillator（VCO） is adopted by using 128 tuning curves. Second, a selectable I/Q divider is employed to divide the VCO frequency by 2 or 3 or 4 or 6. Besides, a phase-switching prescaler is proposed to lower PLL phase noise, a self-calibrated charge pump is used to suppress spur, and a detect-boosting phase frequency detector is adopted to shorten settling time. With a 200 k Hz loop bandwidth, lowest measured phase noise is 106 dBc/Hz at a 10 k Hz offset and 131 dBc/Hz at a 1 MHz offset. Fabricated in the TSMC 0.18 μm CMOS process, the synthesizer occupies a chip area of 1.2 mm^2, consumes only 15 m W from the 1.8 V power supply,and settles within 13.2 s. The synthesizer is optimized for the WIA applications, but can also be used for other short-range wireless communications, such as 433, 868, 916 MHz ISM band applications.

Design of 1.9 GHz RF CMOS VCO

A voltage controlled oscillator （VCO） module is designed, which can be used for the third generation mobile communication （3G） system. The circuit is simulated by spectre radio frequency （RF） by TSMC 0.25 μm CMOS process. During the simulation, the performance parameters of the designed VCO are as follows： tuning range 1.804 GHz-2.039 GHz, phase noise - 136.457 dBc/Hz @1 MHz, - 146.045 dBc/Hz@3 MHz, supply voltage 2.5 V, voltage output rate of 0.8 V-2.6 V, power consumption 25 roW. The layout of the related circuit is drawn by the Virtuoso Layout Editor.