提出了一种新结构薄膜 SOI L IGBT——漂移区减薄的多沟道薄膜 SOI LIGBT( DRT-MC TFSOI L IGB)。主要研究了其低压截止态泄漏电流在 4 2 3～ 573K范围的温度特性。指出 ,通过合理的设计可以使该种新器件具有很低的截止态高温泄漏电流 ...提出了一种新结构薄膜 SOI L IGBT——漂移区减薄的多沟道薄膜 SOI LIGBT( DRT-MC TFSOI L IGB)。主要研究了其低压截止态泄漏电流在 4 2 3～ 573K范围的温度特性。指出 ,通过合理的设计可以使该种新器件具有很低的截止态高温泄漏电流 ,很高的截止态击穿电压 ,足够大的正向导通电流和足够低的正向导通压降。还指出 ,它不仅适用于高温低压应用 ,而且适用于高温高压应用。展开更多
A novel ultralow turnoff loss dual-gate silicon-on-insulator(SOI) lateral insulated gate bipolar transistor(LIGBT) is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-dr...A novel ultralow turnoff loss dual-gate silicon-on-insulator(SOI) lateral insulated gate bipolar transistor(LIGBT) is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-drift, and an n-type carrier stored(CS) layer beneath the p-well. In the on-state, the extra trench gate acts as a barrier, which increases the carrier density at the cathode side of n-drift region, resulting in a decrease of the on-state voltage drop(Von). In the off-state, due to the uniform carrier distribution and the assisted depletion effect induced by the extra trench gate, large number of carriers can be removed at the initial turnoff process, contributing to a low turnoff loss(Eoff). Moreover, owing to the dual-gate field plates and CS layer, the carrier density beneath the p-well can greatly increase, which further improves the tradeoff between Eoffand Von. Simulation results show that Eoff of the proposed SOI LIGBT can decrease by 77% compared with the conventional trench gate SOI LIGBT at the same Von of 1.1 V.展开更多
A novel NMOS triggered LIGBT(NTLIGBT) structure is proposed for electrostatic discharge(ESD) protection in this paper. The structure utilizes internal NMOS to trigger SCR-like structure in LIGBT. The trigger voltage i...A novel NMOS triggered LIGBT(NTLIGBT) structure is proposed for electrostatic discharge(ESD) protection in this paper. The structure utilizes internal NMOS to trigger SCR-like structure in LIGBT. The trigger voltage is significantly reduced because the embedded NMOS causes N+-drain/P-body junction being apt to avalanche breakdown. At the same time, the new parasitic PNP transistor including the newly added P+-region as a collector forms another path to bleed ESD current and then the conductivity modulation in the LIGBT is weakened. As a result, the holding voltage is increased. So, the proposed NTLIGBT structure has a narrow ESD design window. The simulation results show an improvement of 71.5% in trigger voltage and over 50% in holding voltage comparing with the conventional LIGBT structure.展开更多
A novel 600 V snapback-free high-speed silicon-on-insulator lateral insulated gate bipolar transistor is proposed and investigated by simulation.The proposed device features an embedded NPN structure at the anode side...A novel 600 V snapback-free high-speed silicon-on-insulator lateral insulated gate bipolar transistor is proposed and investigated by simulation.The proposed device features an embedded NPN structure at the anode side,and double trenches together with an N-type carrier storage(N-CS)layer at the cathode side,named DT-NPN LIGBT.The NPN structure not only acts as an electron barrier to eliminate the snapback effect in the on-state within a smaller cell pitch but also provides an extra electron extracting path during the turn-off stage to decrease the turnoff loss(E_(off)).The double cathode trenches and N-CS layer hinder the hole from being extracted by the cathode quickly.They then enhance carrier storing effect and lead to a reduced on-state voltage drop(V_(on)).The latch-up immunity is improved by the double cathode trenches.Hence,the DT-NPN LIGBT obtains a superior tradeoff between the V_(on)and E_(off).Additionally,the DT-NPN LIGBT exhibits an improved blocking capability and weak dependence of breakdown voltage(BV)on the P+anode doping concentration because the NPN structure suppresses triggering the PNP transistor.The proposed LIGBT reduces the E_(off)by 55%at the same V_(on),and improves the BV by 7.3%compared to the conventional LIGBT.展开更多
文摘提出了一种新结构薄膜 SOI L IGBT——漂移区减薄的多沟道薄膜 SOI LIGBT( DRT-MC TFSOI L IGB)。主要研究了其低压截止态泄漏电流在 4 2 3～ 573K范围的温度特性。指出 ,通过合理的设计可以使该种新器件具有很低的截止态高温泄漏电流 ,很高的截止态击穿电压 ,足够大的正向导通电流和足够低的正向导通压降。还指出 ,它不仅适用于高温低压应用 ,而且适用于高温高压应用。
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61376080 and 61674027)the Natural Science Foundation of Guangdong Province,China(Grant Nos.2014A030313736 and 2016A030311022)
文摘A novel ultralow turnoff loss dual-gate silicon-on-insulator(SOI) lateral insulated gate bipolar transistor(LIGBT) is proposed. The proposed SOI LIGBT features an extra trench gate inserted between the p-well and n-drift, and an n-type carrier stored(CS) layer beneath the p-well. In the on-state, the extra trench gate acts as a barrier, which increases the carrier density at the cathode side of n-drift region, resulting in a decrease of the on-state voltage drop(Von). In the off-state, due to the uniform carrier distribution and the assisted depletion effect induced by the extra trench gate, large number of carriers can be removed at the initial turnoff process, contributing to a low turnoff loss(Eoff). Moreover, owing to the dual-gate field plates and CS layer, the carrier density beneath the p-well can greatly increase, which further improves the tradeoff between Eoffand Von. Simulation results show that Eoff of the proposed SOI LIGBT can decrease by 77% compared with the conventional trench gate SOI LIGBT at the same Von of 1.1 V.
基金supported by National Natural Science Foundation of China(Grant No.61274080)
文摘A novel NMOS triggered LIGBT(NTLIGBT) structure is proposed for electrostatic discharge(ESD) protection in this paper. The structure utilizes internal NMOS to trigger SCR-like structure in LIGBT. The trigger voltage is significantly reduced because the embedded NMOS causes N+-drain/P-body junction being apt to avalanche breakdown. At the same time, the new parasitic PNP transistor including the newly added P+-region as a collector forms another path to bleed ESD current and then the conductivity modulation in the LIGBT is weakened. As a result, the holding voltage is increased. So, the proposed NTLIGBT structure has a narrow ESD design window. The simulation results show an improvement of 71.5% in trigger voltage and over 50% in holding voltage comparing with the conventional LIGBT structure.
基金supported by Postdoctoral Innovative Talent Support Program under Grant BX20190059the China Postdoctoral Science Foundation under Grant 2019M660235+1 种基金the Sichuan Science and Technology Program under Project 2018JY0555the Science and Technology on Analog Integrated Circuit Laboratory under Project 6142802180509。
文摘A novel 600 V snapback-free high-speed silicon-on-insulator lateral insulated gate bipolar transistor is proposed and investigated by simulation.The proposed device features an embedded NPN structure at the anode side,and double trenches together with an N-type carrier storage(N-CS)layer at the cathode side,named DT-NPN LIGBT.The NPN structure not only acts as an electron barrier to eliminate the snapback effect in the on-state within a smaller cell pitch but also provides an extra electron extracting path during the turn-off stage to decrease the turnoff loss(E_(off)).The double cathode trenches and N-CS layer hinder the hole from being extracted by the cathode quickly.They then enhance carrier storing effect and lead to a reduced on-state voltage drop(V_(on)).The latch-up immunity is improved by the double cathode trenches.Hence,the DT-NPN LIGBT obtains a superior tradeoff between the V_(on)and E_(off).Additionally,the DT-NPN LIGBT exhibits an improved blocking capability and weak dependence of breakdown voltage(BV)on the P+anode doping concentration because the NPN structure suppresses triggering the PNP transistor.The proposed LIGBT reduces the E_(off)by 55%at the same V_(on),and improves the BV by 7.3%compared to the conventional LIGBT.
