Current-collapse suppression and leakage-current decrease in AlGaN/GaN HEMT by sputter-TaN gate-dielectric layer

In this paper, we explore the electrical characteristics of high-electron-mobility transistors(HEMTs) using a TaN/AlGaN/GaN metal insulating semiconductor(MIS) structure. The high-resistance tantalum nitride(TaN) film prepared by magnetron sputtering as the gate dielectric layer of the device achieved an effective reduction of electronic states at the TaN/AlGaN interface, and reducing the gate leakage current of the MIS HEMT, its performance was enhanced. The HEMT exhibited a low gate leakage current of 2.15 × 10^(-7) mA/mm and a breakdown voltage of 1180 V. Furthermore, the MIS HEMT displayed exceptional operational stability during dynamic tests, with dynamic resistance remaining only 1.39 times even under 400 V stress.

A Radiation Hardened Power Device——VDMNOSFET

A radiation hardened N channel Si power device——VDMNOSFET (Vertical Double Diffused Metal Nitride Oxide Semiconductor Field Effect Transistor) is fabricated by using a double layer (Si 3N 4 SiO 2) gate dielectric and a self aligned heavily doped shallow P + region.The effects of ionizing radiation and transient high dose rate radiation of the power VDMNOSFET are also presented.Good radiation hardening performance is obtained,compared with the conventional power VDMOSFET.For the specified 200V VDMNOSFET,the threshold voltage shifts is only -0 5V at a Gamma dose of 1Mrad(Si) with +10V gate bias;the transconductance is degraded by 10% at a Gamma dose of 1Mrad(Si);and no burnout failures occur at the transient high dose rate of 1×10 12 rad(Si)/s.It is demonstrated that the ionizing radiation tolerance and burnout susceptibilities of the power MOSFET are improved significantly by using a double layer (Si 3N 4 SiO 2) gate dielectric and a self aligned heavily doped shallow P + region.

Fabrication and Characteristics of Nano-Floating Gate Memories with ZnO Nano-Crystals as Charge-Storage Layer

Nano-floating gate memory devices with ZnO nano-crystals as charge storage layers are fabricated,and the influence of post-deposition annealing temperature and thickness of the ZnO layer are investigated.Atomic force microscopy and scanning electron microscopy reveal the morphology of discrete ZnO nano-crystals.For capacitance-voltage measurements,it is found that the memory device with 1.5 nm ZnO and annealed at 700℃shows a larger memory window of 4.3 V（at±6 V）and better retention characteristics than memoriy devices with2.5 nm ZnO or annealed at other temperatures.These results indicate that the nano-floating gate memory with ZnO nano-crystals can obtain good trade-off memory properties.

High-performance enhancement-mode AlGaN/GaN MOS-HEMTs with fluorinated stack gate dielectrics and thin barrier layer

We present high-performance enhancement-mode AlGaN/GaN metal-oxide-semiconductor highelectron mobility transistors（MOS-HEMTs） by a fluorinated gate dielectric technique.A nanolaminate of an Al_2O_3/La_xAl_（1-x）O_3/Al_2O_3 stack（x≈0.33） grown by atomic layer deposition is employed to avoid fluorine ions implantation into the scaled barrier layer.Fabricated enhancement-mode MOS-HEMTs exhibit an excellent performance as compared to those with the conventional dielectric-last technique,delivering a large maximum drain current of 916 mA/mm and simultaneously a high peak transconductance of 342 mS/mm.The balanced DC characteristics indicate that advanced gate stack dielectrics combined with buffered fluorine ions implantation have a great potential for high speed GaN E/D-mode integrated circuit applications.