A single-stage flyback driving integrated circuit (IC) for light-emitting diodes (LEDs) is proposed. With an average primary-side current estimation and negative feedback networks, the driver operates in the bound...A single-stage flyback driving integrated circuit (IC) for light-emitting diodes (LEDs) is proposed. With an average primary-side current estimation and negative feedback networks, the driver operates in the boundary conduction mode (BCM), while the output current can be derived and regulated precisely. By means of a simple external resistor divider, a compensation voltage is produced on the ISEN pin during the turn-on period of the primary MOSFET to improve the line regulation performance. On the other hand, since the delay time between the time that the secondary diode current reaches zero and the turn-on time of the MOSFET can be automatically adjusted, the MOSFET can always turn on at the valley voltage even if the inductance of the primary winding varies with the output power, resulting in quasi-resonant switching for different primary inductances. The driving IC is fabricated in a Dongbu HiTek's 0.35μm bipolar-CMOS-DMOS process. An 18 W LED driver is finally built and tested. Results show that the driver has an average efficiency larger than 86%, a power factor larger than 0.97, and works under the universal input voltage (85-265 V) with the LED current variation within ±0.5%.展开更多
For the first time, the fertility of rice genic male sterile line was partially restored with the application of chemical regulators at Hainan Rice Breeding Nursery on Mar 1993. A single panicle of the rice plant coul...For the first time, the fertility of rice genic male sterile line was partially restored with the application of chemical regulators at Hainan Rice Breeding Nursery on Mar 1993. A single panicle of the rice plant could bear as many as 27 grains. The chemical agent that could modulate the growth of the rice plants of genic male sterile line was developed by Prof ZHOU Guangqia and his colleagues at the Biology Institute, Hunan Teachers University, China.展开更多
The complexity and uncertainty in power systems cause great challenges to controlling power grids.As a popular data-driven technique,deep reinforcement learning(DRL)attracts attention in the control of power grids.How...The complexity and uncertainty in power systems cause great challenges to controlling power grids.As a popular data-driven technique,deep reinforcement learning(DRL)attracts attention in the control of power grids.However,DRL has some inherent drawbacks in terms of data efficiency and explainability.This paper presents a novel hierarchical task planning(HTP)approach,bridging planning and DRL,to the task of power line flow regulation.First,we introduce a threelevel task hierarchy to model the task and model the sequence of task units on each level as a task planning-Markov decision processes(TP-MDPs).Second,we model the task as a sequential decision-making problem and introduce a higher planner and a lower planner in HTP to handle different levels of task units.In addition,we introduce a two-layer knowledge graph that can update dynamically during the planning procedure to assist HTP.Experimental results conducted on the IEEE 118-bus and IEEE 300-bus systems demonstrate our HTP approach outperforms proximal policy optimization,a state-of-the-art deep reinforcement learning(DRL)approach,improving efficiency by 26.16%and 6.86%on both systems.展开更多
A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The referen...A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The reference has been successfully implemented in a Chartered 0.35μm CMOS process. The occupied chip area is 0. 022mm^2. Measurements indicate that without trimming, the average output voltage error is 6mV at room temperature compared with the simulation result. The temperature coefficient is 180ppm/℃ in the worst case in the temperature range of 0 to 100℃ ,and the line regulation is ± 1.1%. The reference is applied in an adaptive power MOSFET driver.展开更多
An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, ...An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD (Bipolar-CMOS-DMOS) technology. The experimental results show that all main expectations are achieved.展开更多
A high-accuracy,low-dropout (LDO) voltage regulator is presented. Using the slow-rolloff frequency compensation scheme, the LDO effectively overcomes the stability problem, facilitates the use of a ceramic capacitor...A high-accuracy,low-dropout (LDO) voltage regulator is presented. Using the slow-rolloff frequency compensation scheme, the LDO effectively overcomes the stability problem, facilitates the use of a ceramic capacitor, and improves the output voltage accuracy, which is critical for powering high-performance analog circuitry. The slow-rolloff compensation scheme is realized by introducing three pole-zero pairs, including the proposed polezero pair and sense zero. The post-layout simulation results demonstrate that this LDO has robust system stability, a high open-loop gain, and a high unit-gain frequency,which lead to excellent regulation and transient response performance. The line and load regulation are 27μV/V and 3.78μV/mA, and the overshoots of the output voltage are less than 30mV,while the dropout voltage is 120mV for a 150mA load current.展开更多
Several improvements have been made to the conventional segmented linear light-emitting diode (LED) driver topology to enhance the performance and reliability of the system. A compensation technology is proposed to ...Several improvements have been made to the conventional segmented linear light-emitting diode (LED) driver topology to enhance the performance and reliability of the system. A compensation technology is proposed to adaptively adjust the impedance of the sensing circuit to keep the output luminance constant in case of line volt- age variations. Based on the proposed technology, an active over temperature protection technique is presented to constrain the averaged LED current according to the junction temperature to prevent the driving IC from overheating. Otherwise, a pulse width modulation dimming circuitry which is compatible with input logic level ranging from 1.8 to 20 V is proposed. The proposed technologies are implemented in a 1.0μm 5/20/500 V BCD technol- ogy with three high voltage MOSFETs integrated on chip. The experimental results show that within 220± 15% V, 50 Hz AC line-voltage variation, the output luminance is restrained to 4% in total. The output luminance can also be effectively controlled by the PWM dimming circuitry, and a dimming range of 95% is achieved with good linearity.展开更多
A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects...A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects the nonlinear temperature dependence of the first-order BGR. The piecewise corrected current generator also forms negative feedback to improve the line regulation and power supply rejection (PSR). Measurement results show the proposed BGR achieves a maximum temperature coefficient (TC) of 21.2ppm/℃ without trimming in the temperature range of - 50-125℃ and a PSR of - 60dB at 2.6V supply voltage. The line regulation is 0.8mV/V in the supply range of 2.6-5.6V. It is successfully implemented in an SMIC 0.35μm 5V n-well digital CMOS process with the effective chip area of 0.04mm^2 and power con- sumption of 0.18mW. The reference is applied in a 3,5V optical receiver trans-impedance amplifier.展开更多
A new bandgap reference(BGR) curvature compensation technology is proposed,which is a kind of multiple transistor combination.On the basis of the existing first-order bandgap reference technology,a compensation curr...A new bandgap reference(BGR) curvature compensation technology is proposed,which is a kind of multiple transistor combination.On the basis of the existing first-order bandgap reference technology,a compensation current circuit consisting of a sink current branch and a source current branch is added.The BGR was designed and simulated by using Semiconductor Manufacturing International Corporation(SMIC) 0.18μm CMOS process.The simulation results showed that when the power supply voltage was 1 V,the temperature coefficient of the BGR was 2.08 ppm/℃with the temperature range from—40 to 125℃,the power supply rejection ratio (PSRR) was—64.77 dB and the linear regulation was 0.44 mV/V with the supply power changing from 0.85 to 1.8 V.展开更多
A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with...A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with many high order terms in itself, in a lower temperature range (TR) and a multilevel curvature compen- sation (MLCC) term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ (--40 to 125 ℃) is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation (CSMC) 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient (TC) as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.展开更多
文摘A single-stage flyback driving integrated circuit (IC) for light-emitting diodes (LEDs) is proposed. With an average primary-side current estimation and negative feedback networks, the driver operates in the boundary conduction mode (BCM), while the output current can be derived and regulated precisely. By means of a simple external resistor divider, a compensation voltage is produced on the ISEN pin during the turn-on period of the primary MOSFET to improve the line regulation performance. On the other hand, since the delay time between the time that the secondary diode current reaches zero and the turn-on time of the MOSFET can be automatically adjusted, the MOSFET can always turn on at the valley voltage even if the inductance of the primary winding varies with the output power, resulting in quasi-resonant switching for different primary inductances. The driving IC is fabricated in a Dongbu HiTek's 0.35μm bipolar-CMOS-DMOS process. An 18 W LED driver is finally built and tested. Results show that the driver has an average efficiency larger than 86%, a power factor larger than 0.97, and works under the universal input voltage (85-265 V) with the LED current variation within ±0.5%.
文摘For the first time, the fertility of rice genic male sterile line was partially restored with the application of chemical regulators at Hainan Rice Breeding Nursery on Mar 1993. A single panicle of the rice plant could bear as many as 27 grains. The chemical agent that could modulate the growth of the rice plants of genic male sterile line was developed by Prof ZHOU Guangqia and his colleagues at the Biology Institute, Hunan Teachers University, China.
基金supported in part by the National Key R&D Program(2018AAA0101501)of Chinathe science and technology project of SGCC(State Grid Corporation of China).
文摘The complexity and uncertainty in power systems cause great challenges to controlling power grids.As a popular data-driven technique,deep reinforcement learning(DRL)attracts attention in the control of power grids.However,DRL has some inherent drawbacks in terms of data efficiency and explainability.This paper presents a novel hierarchical task planning(HTP)approach,bridging planning and DRL,to the task of power line flow regulation.First,we introduce a threelevel task hierarchy to model the task and model the sequence of task units on each level as a task planning-Markov decision processes(TP-MDPs).Second,we model the task as a sequential decision-making problem and introduce a higher planner and a lower planner in HTP to handle different levels of task units.In addition,we introduce a two-layer knowledge graph that can update dynamically during the planning procedure to assist HTP.Experimental results conducted on the IEEE 118-bus and IEEE 300-bus systems demonstrate our HTP approach outperforms proximal policy optimization,a state-of-the-art deep reinforcement learning(DRL)approach,improving efficiency by 26.16%and 6.86%on both systems.
文摘A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The reference has been successfully implemented in a Chartered 0.35μm CMOS process. The occupied chip area is 0. 022mm^2. Measurements indicate that without trimming, the average output voltage error is 6mV at room temperature compared with the simulation result. The temperature coefficient is 180ppm/℃ in the worst case in the temperature range of 0 to 100℃ ,and the line regulation is ± 1.1%. The reference is applied in an adaptive power MOSFET driver.
文摘An on-chip voltage reference with a wide supply voltage range is required by some applications,especially that of power management (PM) controller chips applied to telecommunication, automotive, lighting equipment, etc., when high power supply voltage is needed. Accordingly,a new bandgap reference with a wide supply voltage range is proposed. Due to the improved structure,it features a high power supply rejection ratio (PSRR) and high temperature stability. In addition, an auxiliary micro-power reference is introduced to support the sleep mode of the PM chip and reduce its standby power consumption. The auxiliary reference provides bias currents in normal mode and a 1.28V reference voltage in sleep mode to replace the main reference and save power. Simulation results show that the reference provides a reference volt- age of 1.27V,which has a 3.5mV drift over the temperature range from -20 to 120~C and 56t^V deviation over a supply voltage range from 3 to 40V. The PSRR is higher than 100dB for frequency below 10kHz. The circuit was completed in 1.5tzm BCD (Bipolar-CMOS-DMOS) technology. The experimental results show that all main expectations are achieved.
文摘A high-accuracy,low-dropout (LDO) voltage regulator is presented. Using the slow-rolloff frequency compensation scheme, the LDO effectively overcomes the stability problem, facilitates the use of a ceramic capacitor, and improves the output voltage accuracy, which is critical for powering high-performance analog circuitry. The slow-rolloff compensation scheme is realized by introducing three pole-zero pairs, including the proposed polezero pair and sense zero. The post-layout simulation results demonstrate that this LDO has robust system stability, a high open-loop gain, and a high unit-gain frequency,which lead to excellent regulation and transient response performance. The line and load regulation are 27μV/V and 3.78μV/mA, and the overshoots of the output voltage are less than 30mV,while the dropout voltage is 120mV for a 150mA load current.
基金Project supported by the National Natural Science Foundation of China(No.61106026)
文摘Several improvements have been made to the conventional segmented linear light-emitting diode (LED) driver topology to enhance the performance and reliability of the system. A compensation technology is proposed to adaptively adjust the impedance of the sensing circuit to keep the output luminance constant in case of line volt- age variations. Based on the proposed technology, an active over temperature protection technique is presented to constrain the averaged LED current according to the junction temperature to prevent the driving IC from overheating. Otherwise, a pulse width modulation dimming circuitry which is compatible with input logic level ranging from 1.8 to 20 V is proposed. The proposed technologies are implemented in a 1.0μm 5/20/500 V BCD technol- ogy with three high voltage MOSFETs integrated on chip. The experimental results show that within 220± 15% V, 50 Hz AC line-voltage variation, the output luminance is restrained to 4% in total. The output luminance can also be effectively controlled by the PWM dimming circuitry, and a dimming range of 95% is achieved with good linearity.
文摘A piecewise curvature-corrected bandgap reference (BGR) with negative feedback is proposed. It features employing a temperature-dependent resistor ratio technique to get a piecewise corrected current, which corrects the nonlinear temperature dependence of the first-order BGR. The piecewise corrected current generator also forms negative feedback to improve the line regulation and power supply rejection (PSR). Measurement results show the proposed BGR achieves a maximum temperature coefficient (TC) of 21.2ppm/℃ without trimming in the temperature range of - 50-125℃ and a PSR of - 60dB at 2.6V supply voltage. The line regulation is 0.8mV/V in the supply range of 2.6-5.6V. It is successfully implemented in an SMIC 0.35μm 5V n-well digital CMOS process with the effective chip area of 0.04mm^2 and power con- sumption of 0.18mW. The reference is applied in a 3,5V optical receiver trans-impedance amplifier.
文摘A new bandgap reference(BGR) curvature compensation technology is proposed,which is a kind of multiple transistor combination.On the basis of the existing first-order bandgap reference technology,a compensation current circuit consisting of a sink current branch and a source current branch is added.The BGR was designed and simulated by using Semiconductor Manufacturing International Corporation(SMIC) 0.18μm CMOS process.The simulation results showed that when the power supply voltage was 1 V,the temperature coefficient of the BGR was 2.08 ppm/℃with the temperature range from—40 to 125℃,the power supply rejection ratio (PSRR) was—64.77 dB and the linear regulation was 0.44 mV/V with the supply power changing from 0.85 to 1.8 V.
基金Project supported by the Fund of Liaoning Province Education Department(No.L2013045)
文摘A novel high-order curvature compensation negative voltage bandgap reference (NBGR) based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation (ECC) term with many high order terms in itself, in a lower temperature range (TR) and a multilevel curvature compen- sation (MLCC) term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ (--40 to 125 ℃) is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation (CSMC) 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient (TC) as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.