Arithmetic Logic Unit(ALU) as one of the main parts of any computing hardware plays an important role in digital computers. In quantum computers which can be realized by reversible logics and circuits, reversible ALUs...Arithmetic Logic Unit(ALU) as one of the main parts of any computing hardware plays an important role in digital computers. In quantum computers which can be realized by reversible logics and circuits, reversible ALUs should be designed. In this paper, we proposed three different designs for reversible 1-bit ALUs using our proposed 3×3 and 4×4 reversible gates called MEB3 and MEB4(Moallem Ehsanpour Bolhasani) gates, respectively. The first proposed reversible ALU consists of six logical operations. The second proposed ALU consists of eight operations, two arithmetic, and six logical operations. And finally, the third proposed ALU consists of sixteen operations, four arithmetic operations, and twelve logical operations. Our proposed ALUs can be used to construct efficient quantum computers in nanotechnology, because the proposed designs are better than the existing designs in terms of quantum cost, constant input, reversible gates used, hardware complexity, and functions generated.展开更多
All-optical canonical logic units at 40 Gb/s using bidirectional four-wave mixing(FWM) in highly nonlinear fiber are proposed and experimentally demonstrated. Clear temporal waveforms and correct pattern streams are s...All-optical canonical logic units at 40 Gb/s using bidirectional four-wave mixing(FWM) in highly nonlinear fiber are proposed and experimentally demonstrated. Clear temporal waveforms and correct pattern streams are successfully observed in the experiment. This scheme can reduce the amount of nonlinear devices and enlarge the computing capacity compared with general ones. The numerical simulations are made to analyze the relationship between the FWM efficiency and the position of two interactional signals.展开更多
In this research, a fast methodology to calculate the exact value of the average dynamic power consumption for CMOS combinational logic circuits is developed. The delay model used is the unit-delay model where all gat...In this research, a fast methodology to calculate the exact value of the average dynamic power consumption for CMOS combinational logic circuits is developed. The delay model used is the unit-delay model where all gates have the same propagation delay. The main advantages of this method over other techniques are its accuracy, as it is deterministic and it requires less computational effort compared to exhaustive simulation approaches. The methodology uses the Logic Pictures concept for obtaining the nodes’ toggle rates. The proposed method is applied to well-known circuits and the results are compared to exhaustive simulation and Monte Carlosimulation methods.展开更多
The timing and master control logic （MCL） units are the most important function units of the diagnostic neutral beam （DNB） power supply control system. The units control the operation of nine power supply subsyste...The timing and master control logic （MCL） units are the most important function units of the diagnostic neutral beam （DNB） power supply control system. The units control the operation of nine power supply subsystems of the DNB system, and provide protection for the DNB system from faults such as beam source arc down. Based on the characteristics of the DNB power supply system, the timing and MCL units have been designed, fabricated and tested. Experiments prove that the timing unit is convenient, flexible and reliable, and the MCL is functional.展开更多
a-Input resolution and a-unit resolution for generalized Horn clause set are discussed in linguistic truth-valued lattice-valued first-order logic （ Lv（ n × 2） F（X） ）, which can represent and handle uncerta...a-Input resolution and a-unit resolution for generalized Horn clause set are discussed in linguistic truth-valued lattice-valued first-order logic （ Lv（ n × 2） F（X） ）, which can represent and handle uncertain linguistic values-based information. Firstly the concepts of a-input resolution and a.unit resolution are presented, and the equivalence of them is shown. Then α-input （a-unit） resolution is equivalently transformed from Lv（ n × 2） F（X） into that of LnP（X）, and their soundness and completeness are also established. Finally an algorithm for a-unit resolution is contrived in LnP（ X）.展开更多
斜坡单元依据山脊线和山谷线划分的单元,能够体现研究区的真实地质环境条件,作为评价单元在地质灾害易发性评价中具有重要意义。采用地理信息系统(geographic information system,GIS),运用水文分析工具提取峨边县斜坡单元,选取归一化...斜坡单元依据山脊线和山谷线划分的单元,能够体现研究区的真实地质环境条件,作为评价单元在地质灾害易发性评价中具有重要意义。采用地理信息系统(geographic information system,GIS),运用水文分析工具提取峨边县斜坡单元,选取归一化植被指数、坡度、高程、地形起伏度、地层岩性、距水系的距离、距断层距离、距道路的距离8个因子,使用逻辑回归模型(logistic regression,LR),制得地质灾害易发性概率图,将其划分为非易发区、低易发区、中易发区、高易发区和极高易发区。结果表明:ROC(receiver operating characteristic curve)曲线的线下面积(area under curve,AUC)精度检验值为0.917,极高易发区和高易发区内地质灾害点数占总灾害点数的81.3%,说明对峨边县进行基于斜坡单元使用逻辑回归进行地质灾害的易发性评价具有可行性和较高精度。展开更多
文摘Arithmetic Logic Unit(ALU) as one of the main parts of any computing hardware plays an important role in digital computers. In quantum computers which can be realized by reversible logics and circuits, reversible ALUs should be designed. In this paper, we proposed three different designs for reversible 1-bit ALUs using our proposed 3×3 and 4×4 reversible gates called MEB3 and MEB4(Moallem Ehsanpour Bolhasani) gates, respectively. The first proposed reversible ALU consists of six logical operations. The second proposed ALU consists of eight operations, two arithmetic, and six logical operations. And finally, the third proposed ALU consists of sixteen operations, four arithmetic operations, and twelve logical operations. Our proposed ALUs can be used to construct efficient quantum computers in nanotechnology, because the proposed designs are better than the existing designs in terms of quantum cost, constant input, reversible gates used, hardware complexity, and functions generated.
基金mainly supported by the National Natural Science Fund for Distinguished Young Scholars (61125501)NSFC Major International Joint Research Project (61320106016)
文摘All-optical canonical logic units at 40 Gb/s using bidirectional four-wave mixing(FWM) in highly nonlinear fiber are proposed and experimentally demonstrated. Clear temporal waveforms and correct pattern streams are successfully observed in the experiment. This scheme can reduce the amount of nonlinear devices and enlarge the computing capacity compared with general ones. The numerical simulations are made to analyze the relationship between the FWM efficiency and the position of two interactional signals.
文摘In this research, a fast methodology to calculate the exact value of the average dynamic power consumption for CMOS combinational logic circuits is developed. The delay model used is the unit-delay model where all gates have the same propagation delay. The main advantages of this method over other techniques are its accuracy, as it is deterministic and it requires less computational effort compared to exhaustive simulation approaches. The methodology uses the Logic Pictures concept for obtaining the nodes’ toggle rates. The proposed method is applied to well-known circuits and the results are compared to exhaustive simulation and Monte Carlosimulation methods.
基金Meg-science Engineering Project of the Chinese Academy of Sciences
文摘The timing and master control logic （MCL） units are the most important function units of the diagnostic neutral beam （DNB） power supply control system. The units control the operation of nine power supply subsystems of the DNB system, and provide protection for the DNB system from faults such as beam source arc down. Based on the characteristics of the DNB power supply system, the timing and MCL units have been designed, fabricated and tested. Experiments prove that the timing unit is convenient, flexible and reliable, and the MCL is functional.
基金National Natural Science Foundations of China (No. 60875034,No. 61175055)
文摘a-Input resolution and a-unit resolution for generalized Horn clause set are discussed in linguistic truth-valued lattice-valued first-order logic （ Lv（ n × 2） F（X） ）, which can represent and handle uncertain linguistic values-based information. Firstly the concepts of a-input resolution and a.unit resolution are presented, and the equivalence of them is shown. Then α-input （a-unit） resolution is equivalently transformed from Lv（ n × 2） F（X） into that of LnP（X）, and their soundness and completeness are also established. Finally an algorithm for a-unit resolution is contrived in LnP（ X）.
文摘斜坡单元依据山脊线和山谷线划分的单元,能够体现研究区的真实地质环境条件,作为评价单元在地质灾害易发性评价中具有重要意义。采用地理信息系统(geographic information system,GIS),运用水文分析工具提取峨边县斜坡单元,选取归一化植被指数、坡度、高程、地形起伏度、地层岩性、距水系的距离、距断层距离、距道路的距离8个因子,使用逻辑回归模型(logistic regression,LR),制得地质灾害易发性概率图,将其划分为非易发区、低易发区、中易发区、高易发区和极高易发区。结果表明:ROC(receiver operating characteristic curve)曲线的线下面积(area under curve,AUC)精度检验值为0.917,极高易发区和高易发区内地质灾害点数占总灾害点数的81.3%,说明对峨边县进行基于斜坡单元使用逻辑回归进行地质灾害的易发性评价具有可行性和较高精度。
