Development and application of ferrite materials for low temperature co-fired ceramic technology

Development and application of ferrite materials for low temperature co-fired ceramic （LTCC） technology are dis- cussed, specifically addressing several typical ferrite materials such as M-type barium ferrite, NiCuZn ferrite, YIG ferrite, and lithium ferrite. In order to permit co-firing with a silver internal electrode in LTCC process, the sintering temperature of ferrite materials should be less than 950 ℃. These ferrite materials are research focuses and are applied in many ways in electronics.

Application of Low Pressure Plasma Technology in the Field of Environmental Protection

The characteristics of low pressure plasma produced by a gas discharges lie in thatthe energy of the electrons are much higher than that of the heavy particles in the system. Inthis paperl the low-pressure plasma treatment technology for the environmental contaminantswas synthetically studied, and the reaction processing and mechanism between the low-pressureplasma and the environmental contaminants were theoretically analyzed. At last, the prospectsand existing problems on the application of low-pressure plasma in the field of environmentalprotection were discussed.

International Symposium on Low Carbon Technology (2009 Beijing)——Creating low carbon economy & green growth

September 15―18, 2009, Beijing, China Website: www.ISLCT2009.com CHAIR:Professor Jianzhong XU (Chinese Academy of Sciences, China) (xjz@mail.etp.ac.cn, wyl-dhh@mail.tsinghua.edu.cn)CO-CHAIR: Dr. Mikio SATO (satomiki@criepi.denken.or.jp) (Central Research Institute of Electric Power Industry, Japan) Dr. Jinsoo Song (jsong@kier.re.kr) (Korean Society for New & Renewable Energy, Korea)

International Symposium on Low Carbon Technology (2009 Beijing)——Creating low carbon economy & green growth

September 15―18, 2009, Beijing, China Website: www.ISLCT2009.com CHAIR: Professor Jianzhong XU (Chinese Academy of Sciences, China) (xjz@mail.etp.ac.cn, wyl-dhh@mail.tsinghua.edu.cn) CO-CHAIR: Dr. Mikio SATO (satomiki@criepi.denken.or.jp) (Central Research Institute of Electric Power Industry, Japan) Dr. Jinsoo Song (jsong@kier.re.kr)

An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies(Invited paper)

Low power consumption is a major issue in nowadays electronics systems. This trend is pushed by the development of data center related to cloud services and soon to the Internet of Things （IoT） deployment. Memories are one of the major contributors to power consumption. However, the development of emerging memory technologies paves the way to low-power design, through the partial replacement of the dynamic random access memory （DRAM） with the non-volatile stand-alone memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects. In the latter case, non-volatile flip-flops （NVFFs） seem a promising candidate to replace the retention latch. Indeed, IoT objects present long sleep time and NVFFs offer to save data in registers with zero power when the application is idle. This paper gives an overview of NVFF architecture flavors for various emerging memory technologies.

A 1.2-V,84-dB∑△ADM in 0.18-μm digital CMOS technology

A low power and low voltage∑△analog-to-digital modulator is realized with digital CMOS technology, which is due to full compensated depletion mode capacitors.Compared with mixed signal technology,this type of modulator is more compatible for pure digital applications.A pseudo-two-stage class-AB OTA is used in switchedcapacitor integrators for low voltage and low power.The modulator is realized in standard SMIC 0.18μm 1P6M digital CMOS technology.Measured results show that with 1.2 V supply voltage and a 6 MHz sample clock,the dynamic range of the modulator is 84 dB and the total power dissipation is 2460μW.

A low-noise widely tunable Gm-C filter with frequency calibration

A fourth-order Gm-C Chebyshev low-pass filter is presented as channel selection filter for reconfigurable multi-mode wireless receivers. Low-noise technologies are proposed in optimizing the noise characteristics of both the Gm cells and the filter topology. A frequency tuning strategy is used by tuning both the transconductance of the Gm cells and the capacitance of the capacitor banks. To achieve accurate cut-off frequencies, an on-chip calibration circuit is presented to compensate for the frequency inaccuracy introduced by process variation. The filter is fabricated in a 0.13 m CMOS process. It exhibits a wide programmable bandwidth from 322.5 k Hz to20 MHz. Measured results show that the filter has low input referred noise of 5.9 n V/（Hz）^（1/2） and high out-of-band IIP3 of 16.2 d Bm. It consumes 4.2 and 9.5 m W from a 1 V power supply at its lowest and highest cut-off frequencies respectively.

Optimal Home Energy Management System with Mixed Types of Loads

This paper presents a novel home area energy management system(HEMS)for smart homes with different load profiles installed with photovoltaic generation,energy storage,and DC demand.The developed HEMS is shown to optimize the utilization of local renewables while minimizing energy waste between AC and DC conversions and between storage charging and discharging.Previous studies on HEMS have not considered the impact of load types.In this study,the performance of the proposed HEMS is demonstrated on different smart homes with and without electric heating.A comparative study is carried out to investigate battery behavior,characteristics of AC and DC conversion,and benefits that customers receive.A sensitivity analysis is also conducted to discuss the effects from varied energy storage capacities,AC/DC conversion efficiencies,and PV output.The results show that cost reduction in energy bills can be greatly impacted by load profiles,and customers with electric heating load coupled with sufficiently large energy storage would receive the most reduction in their energy bills.

Power optimization and performance improvement for embedded Ethernet SOC

Information appliance is the combination of traditional home appliances and the internet technology. In this article, an Ethernet controller system-on-chip （SOC） solution for information appliances is presented. To achieve high performance, the embedded 8 bits 8051 micro control unit （MCU） is optimized by an independent instruction bus and a data bus. Besides, a two-stage pipeline feature is added. Compared with the existing 8051 core, the enhanced one-cycle MCU offers ten times improvement in instruction execution efficiency. Meanwhile, the performance of media access control （MAC） circuit is greatly improved by adopting various techniques such as direct memory access （DMA） control, paging strategy, etc. To reduce the power consumption, clock gating, low power supply, and multi-working-clock are adopted. Moreover, to achieve rapid data communication in different clock frequency circuits, a simple ping-pong first in first out （FIFO） circuit is realized. The chip is implemented using TSMC 0.25 μm two-poly four-metal mixed signal complementary metal oxide semiconductor （CMOS） technology. Its die area is 4.8 min× 4.6 mm. The test results show that the maximum throughput of Ethernet packets can reach 7 Mb/s while the power consumption is rather low-the working current is just about 200 mA.

Effect of Li_(2)CO_(3)addition on structural and electrical properties of 0.7BiFeO_(3)-0.3BaTiO_(3)piezoelectric ceramic

In this work,Li_(2)O_(3)was added into 0.7BiFeO_(3)-0.3BaZr_(0.02)Ti_(0.98)O_(3)-0.01molMnO_(2)(70BFBTMn)piezoelectric ceramics to reduce their sintering temperatures.70BFBTMn ceramics were sintered by a conventional solid reaction method,and their structural,dielectric,piezoelectric and ferroelectric properties were studied.These results indicate that 0.5%(mole)Li_(2)O_(3)is the optimized content and it can reduce the sintering temperature by 100°C,making the possibility of the piezoelectric ceramics cofiring with Ag electrodes at low temperatures to manufacture multilayer piezoelectric actuators.