A novel integrated circuit for driving LED lighting has been proposed, designed and fabricated. Besides the typical parts of LED driver, an integral part was added at the output terminal of error amplifier in the driv...A novel integrated circuit for driving LED lighting has been proposed, designed and fabricated. Besides the typical parts of LED driver, an integral part was added at the output terminal of error amplifier in the driver. In this way, a novel average current mode can be set up to take the place ordinary peak current control mode. In addition, a BUCK low-level topology was adopted, too. It can be used to drive up to eight 1 W HB LED lights with 350 mA constant current. In this way, the LED driver displays high performance, in which output current with less 1% error and total efficiency as high as 96%. The feasibility of the design has been verified by actual measurement on the fabricated chip.展开更多
为解决在2.5 V供电下的LVDS(Low Voltage Differential Signaling)驱动器处理1.2 V数字信号时,由于传统电平转换电路性能较差,且易产生误码的问题,设计了一款应用于CMOS(Complementary Metal Oxide Semiconductor)图像传感器芯片的LVDS...为解决在2.5 V供电下的LVDS(Low Voltage Differential Signaling)驱动器处理1.2 V数字信号时,由于传统电平转换电路性能较差,且易产生误码的问题,设计了一款应用于CMOS(Complementary Metal Oxide Semiconductor)图像传感器芯片的LVDS接口电路,该芯片中数字电路采用1.2 V供电,LVDS驱动器使用2.5 V供电。笔者提出两种电平转换电路方案,用于解决该问题。方案1将1.2 V数字信号进行电平转换,再使用D触发器对转换后的信号进行采样,从而避免误码的产生;方案2使用迟滞比较器作为电平转换电路。设计采用Tower Jazz 65 nm CMOS工艺进行流片验证。经过测试,两种方案均有效地解决了LVDS驱动器误码的问题。展开更多
文摘A novel integrated circuit for driving LED lighting has been proposed, designed and fabricated. Besides the typical parts of LED driver, an integral part was added at the output terminal of error amplifier in the driver. In this way, a novel average current mode can be set up to take the place ordinary peak current control mode. In addition, a BUCK low-level topology was adopted, too. It can be used to drive up to eight 1 W HB LED lights with 350 mA constant current. In this way, the LED driver displays high performance, in which output current with less 1% error and total efficiency as high as 96%. The feasibility of the design has been verified by actual measurement on the fabricated chip.