Total Ionizing Dose Radiation Effects on MOS Transistors with Different Layouts

Both nMOS and pMOS transistors with two-edged and multi-finger layouts are fabricated in a standard commercial 0.6μm CMOS/bulk process to study their total ionizing dose （TID） radiation effects. The leakage current, threshold voltage shift, and transconductance of the devices are monitored before and after T-ray irradiation. Different device bias conditions are used during irradiation. The experiment results show that TID radiation effects on nMOS devices are very sensitive to their layout structures. The impact of the layout on TID effects on pMOS devices is slight and can be neglected.

Total dose radiation effects on SOI NMOS transistors with different layouts

Partially-depleted Silicon-On-Insulator Negative Channel Metal Oxide Semiconductor （SOI NMOS） transistors with different layouts are fabricated on radiation hard Separation by IMplanted OXygen （SIMOX） substrate and tested using 10 keV X-ray radiation sources. The radiation performance is characterized by transistor threshold voltage shift and transistor leakage currents as a function of the total dose up to 2.0×10^6 rad（Si）. The results show that the total dose radiation effects on NMOS devices are very sensitive to their layout structures.

Study of total ionizing dose radiation effects on enclosed gate transistors in a commercial CMOS technology

This paper studies the total ionizing dose radiation effects on MOS （metal-oxide-semiconductor） transistors with normal and enclosed gate layout in a standard commercial CMOS （compensate MOS） bulk process. The leakage current, threshold voltage shift, and transconductance of the devices were monitored before and after γ-ray irradiation. The parameters of the devices with different layout under different bias condition during irradiation at different total dose are investigated. The results show that the enclosed layout not only effectively eliminates the leakage but also improves the performance of threshold voltage and transconductance for NMOS （n-type channel MOS） transistors. The experimental results also indicate that analogue bias during irradiation is the worst case for enclosed gate NMOS. There is no evident different behaviour observed between normal PMOS （p-type channel MOS） transistors and enclosed gate PMOS transistors.

The Theory of Field-Effect Transistors:XI. The Bipolar Electrochemical Currents(1-2-MOS-Gates on Thin-Thick Pure-Impure Base)

The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.

Impurity Deionization Effects on Surface Recombination DC Current-Voltage Characteristics in MOS Transistors

Impurity deionization on the direct-current current-voltage characteristics from electron-hole recombi- nation （R-DCIV） at SiO2/Si interface traps in MOS transistors is analyzed using the steady-state Shockley-Read-Hall recombination kinetics and the Fermi distributions for electrons and holes. Insignificant distortion is observed over 90% of the bell-shaped R-DCIV curves centered at their peaks when impurity deionization is excluded in the theory. This is due to negligible impurity deionization because of the much lower electron and hole concentrations at the interface than the impurity concentration in the 90% range.

Improved performance of back-gate MoS2 transistors by NH3-plasma treating high-k gate dielectrics

NH3-plasma treatment is used to improve the quality of the gate dielectric and interface. Al2O3 is adopted as a buffer layer between HfO2 and MoS2 to decrease the interface-state density. Four groups of MOS capacitors and back-gate transistors with different gate dielectrics are fabricated and their C–V and I–V characteristics are compared. It is found that the Al2O3/HfO2 back-gate transistor with NH3-plasma treatment shows the best electrical performance: high on–off current ratio of 1.53 × 107, higher field-effect mobility of 26.51 cm2/V·s, and lower subthreshold swing of 145 m V/dec.These are attributed to the improvements of the gate dielectric and interface qualities by the NH3-plasma treatment and the addition of Al2O3 as a buffer layer.

The Bipolar Field-Effect Transistor: III.Short Channel Electrochemical Current Theory (Two-MOS-Gates on Pure-Base)

This paper describes the short channel theory of the bipolar field-effect transistor （BiFET） by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.

The Bipolar Field-Effect Transistor:Ⅳ.Short Channel Drift-Diffusion Current Theory(Two-MOS-Gates on Pure-Base)

This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.

The Bipolar Field-Effect Transistor:Ⅰ.Electrochemical Current Theory(Two-MOS-Gates on Pure-Base)

This paper describes the bipolar field-effect transistor （BiFET） and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical （quasi-Fermi） potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.

The Bipolar Field-Effect Transistor:II.Drift-Diffusion Current Theory(Two-MOS-Gates on Pure-Base)

This paper describes the drift-diffusion theory of the bipolar field-effect transistor （BiFET） with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin-pure-base. Analytical solution is obtained by partitioning the two-dimensional transistor into two one-dimensional problems coupled by the parametric sur- face-electric-potential. Total and component output and transfer currents and conductances versus D. C. voltages from the drift-diffusion theory, and their deviations from the electrochemical （quasi-Fermi） potential-gradient theory,are presented over practical ranges of thicknesses of the silicon base and gate oxide. A substantial contri- bution from the longitudinal gradient of the square of the transverse electric field is shown.

The Bipolar Theory of the Field-Effect Transistor:X.The Fundamental Physics and Theory(All Device Structures)

This paper describes the foundation underlying the device physics and theory of the semiconductor field effect transistor which is applicable to any devices with two carrier species in an electric field. The importance of the boundary conditions on the device current-voltage characteristics is discussed. An illustration is given of the transfer DCIV characteristics computed for two boundary conditions,one on electrical potential,giving much higher drift-limited parabolic current through the intrinsic transistor, and the other on the electrochemical potentials, giving much lower injection-over-thebarrier diffusion-limited current with ideal 60mV per decade exponential subthreshold roll-off, simulating electron and hole contacts. The two-MOS-gates on thin pure-body silicon field-effect transistor is used as examples

Realization of a tunable analog predistorter using parallel combination technique for laser driver applications

This paper describes a new approach for designing analog predistorters that can compensate for the nonlinear distortion of laser drivers in a radio-over-fiber （RoF） system. In contrast to previous works, this paper analyzes the transfer characteristics of CMOS transistors, by combining parallel currents of CMOS transistors in various W/L and negative bias voltages to realize the tunable analog predistortion function. The circuit is fabricated by a standard 0.18txm CMOS technology. The core circuit current consumption is only 15mA and the entire driver circuit works in a band-pass from 1 - 2.2GHz. Experimental results of two-tone tests have shown that with an analog predistortoer the IIP3 of the laser driver circuit has an improvement of 4.91 dB.

Nanosensitive Silicon Microprobes for Mechanical Detection and Measurements

Nanosensitive mechanical microprobes with CMOS transistors, inverters, inverters cascades and ring oscillators, integrated on the thin silicon cantilevers are presented. Mechanical stress shifts linear, steep switching fragment of the inverters’ electrical characteristics. Microprobes were fabricated with use of the standard CMOS technology (3.5 μm design rules, one level polysilicon gate and one level of the metal interconnections) and relief MEMS technique. Control of the silicon cantilever thickness was satisfactory in the range above the few micrometers. Several computer simulations were done to analyze and optimize transistors location on the cantilever, in respect to the mechanical stress distribution. Results of the microprobes electromechanical tests confirm high deflection sensitivity 1.2 - 1.8 mV/nm and force sensitivity 2.0 - 2.4 mV/nN, both in nano ranges. Microprobes, with the ring oscillators revealed sensitivities 5 - 8 Hz/nm. These microprobes seem to be appropriate for applications in precise chemical and biochemical sensing.

Manganese and chromium doping in atomically thin MoS2

Recently,two-dimensional materials have been attracting increasing attention because of their novel properties and promising applications.However,the impurity doping remains a significant challenge owing to the lack of the doping strategy in the atomically thin layers.Here we report on the chromium（Cr） and manganese（Mn）doping in atomically-thin MoS_2 crystals grown by chemical vapor deposition.The Cr/Mn doped MoS_2 samples are characterized by a peak at 1.76 and 1.79 eV in photoluminescence spectra,respectively,compared with the undoped one at 1.85 eV.The field-effect transistor（FET） devices based on the Mn doping show a higher threshold voltage than that of the pure MoS_2 while the Cr doping exhibits the opposite behavior.Importantly,the carrier concentration in these samples displays a remarkable difference arising from the doping effect,consistent with the evolution of the FET performance.The temperature-dependent conductivity measurements further demonstrate a large variation in activation energy.The successful incorporation of the Mn and Cr impurities into the monolayer MoS_2 paves the way towards the high Curie temperature two-dimensional dilute magnetic semiconductors.

A surface potential-based non-charge-sheet core model for undoped surrounding-gate MOSFETs

A surface potential based non-charge-sheet core model for cylindrical undoped surrounding-gate （SRG） MOSFETs is presented. It is based on the exact surface potential solution of Poisson＇s equation and Pao-Sah＇s dual integral without the charge-sheet approximation, allowing the SRG-MOSFET characteristics to be adequately described by a single set of the analytic drain current equation in terms of the surface potential evaluated at the source and drain ends. It is valid for all operation regions and traces the transition from the linear to saturation and from the sub-threshold to strong inversion region without fitting-parameters, and verified by the 3-D numerical simulation.

Tunnel contacted MoS_2 transistor makes thinnest polarity-tunable rectifier

With the support by the National Natural Science Foundation of China,a collaborative study by the research group led by Prof.Zhang Zhidong(张志东)and Prof.Han Zheng(韩拯)from the Institute of Metal Research,Chinese Academy of Sciences demonstrates that by intercalating a tunneling layer