Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology fo...Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and efficient manner to improve the reliability, robustness and stability of the circuit. The device sensitive parameters are identified and accurately quantified by continuous realistic assessments using statistical methods. The modularity of the methodology can be validated by the output performance obtained from the gain and phase response of OTA which is highly stable when subjected to worst case process variation scenario. In the proposed optimization, the circuit is strengthened by fixing the optimum aspect ratio without adding any additional compensation devices complicating the circuit resulting in low power consumption of only 0.116 mW in standard CMOS 0.18 μm technology with 1.8 V power supply.展开更多
文摘潮间带是滨海湿地的重要组成部分,对生态和经济的发展具有重要意义。由于海水与陆地的动态交互作用,以瞬时性遥感图像为数据源的遥感信息提取方法难以准确获取潮滩范围。针对此问题,研究提出了一种基于Google Earth Engine(GEE)云平台和遥感指数的潮间带信息提取方法。该方法利用2021年的Landsat8时序影像数据,在最大光谱指数合成算法(maximum spectral index composite,MSIC)和大津算法(OTSU)形成多层自动决策树分类模型的基础之上,构建基于融合数字高程模型(digital elevation model,DEM)数据的决策树算法,并以舟山群岛海岸带为例,计算舟山群岛潮间带面积。研究结果显示2021年舟山群岛潮间带面积为35.19 km 2。通过谷歌地球的高空间分辨率影像进行精度评价,总体精度为97.7%,Kappa系数为0.95,具有较好的提取精度和实用效果。该方法能够实现自动、快速地提取潮间带信息,为海岸带资源的可持续管理和利用提供数据支撑,进一步促进海岸带区域的高质量发展。
文摘Technology development and continuous down scaling in CMOS fabrication makes Mixed Signal Integrated Circuits (MSIC) more vulnerable to process variation. This paper presents a well defined novel design methodology for process variability aware design by incorporating the major challenge of statistical circuit performance relating the device and circuit level variation in an accurate and efficient manner to improve the reliability, robustness and stability of the circuit. The device sensitive parameters are identified and accurately quantified by continuous realistic assessments using statistical methods. The modularity of the methodology can be validated by the output performance obtained from the gain and phase response of OTA which is highly stable when subjected to worst case process variation scenario. In the proposed optimization, the circuit is strengthened by fixing the optimum aspect ratio without adding any additional compensation devices complicating the circuit resulting in low power consumption of only 0.116 mW in standard CMOS 0.18 μm technology with 1.8 V power supply.