Doppler radar by using single multicarrier pulse based on optical fibre delay lines

The proposed Doppler measurement technique shows that the Doppler measurements can be accomplished by a single pulse with multiple frequency components through optical fibre delay lines.Range and velocity ambiguity can be removed,and the velocity resolution can be improved dramatically by using long optical fibre delay lines.Furthermore,the velocity resolution can be modified by adjusting the length of optical fibre delay lines.In addition,the proposed radar can achieve high range resolution by using a single wideband pulse.As a result,the new approach can improve radar performance significantly.

Outboard abnormal noise source localization method with curved surface projection based on time delay matching and weighting criterion

An improved localization method consisting of ＂filtering-time delay estimationhyperbolic localization＂ is proposed. Combining the empirical mode decomposition（EMD）and time delay estimation method based on generalized average magnitude difference function,the original signals are decomposed into intrinsic mode function（IMF） components. The energy distribution criterion and spectrum consistency criterion are used to select the IMFs, which can represent the physical characteristics of the source signal. Several sets of signals are applied to estimate the time delay, and then a vector matching criterion is proposed to select the correct time delay estimation. Considering the hydrophones location, a shell model is established and projected to a plane according to the quadrant before the hyperbolic localization. Results of mooring and sailing tests show that the proposed method improves the localization accuracy,and reduces the error caused by time delay estimation.

Design and Tool Flow of a Reconfigurable Asynchronous Neural Network Accelerator

Convolutional Neural Networks(CNNs)are widely used in computer vision,natural language processing,and so on,which generally require low power and high efficiency in real applications.Thus,energy efficiency has become a critical indicator of CNN accelerators.Considering that asynchronous circuits have the advantages of low power consumption,high speed,and no clock distribution problems,we design and implement an energy-efficient asynchronous CNN accelerator with a 65 nm Complementary Metal Oxide Semiconductor(CMOS)process.Given the absence of a commercial design tool flow for asynchronous circuits,we develop a novel design flow to implement Click-based asynchronous bundled data circuits efficiently to mask layout with conventional Electronic Design Automation(EDA)tools.We also introduce an adaptive delay matching method and perform accurate static timing analysis for the circuits to ensure correct timing.The accelerator for handwriting recognition network(LeNet-5 model)is implemented.Silicon test results show that the asynchronous accelerator has 30%less power in computing array than the synchronous one and that the energy efficiency of the asynchronous accelerator achieves 1.538 TOPS/W,which is 12%higher than that of the synchronous chip.

A bootstrapped switch employing a new clock feed-through compensation technique

Nonlinearity caused by the clock feed-through of a bootstrapped switch and its compensation techniques are analyzed. All kinds of clock feed-through compensation configurations and their drawbacks are also investigated. It is pointed out that the delay path match of the clock boosting circuit is the critical factor that affects the effectiveness of clock feed-through compensation. Based on that, a new clock feed-through compensation configuration and corresponding bootstrapped switch are presented and designed optimally with the UMC mixed-mode/RF 0.18 μm 1P6M P-sub twin-well CMOS process by orientating and elaborately designing the switch MOSFETs that influence the delay path match of the clock boosting circuit. HSPICE simulation results show that the proposed clock feedthrough compensation configuration can not only enhance the sampling accuracy under variations of process, power supply voltage, temperature and capacitors but also decrease the even harmonic, high-order odd harmonic and THD on the whole effectively.