Multi-hop teleportation in a quantum network based on mesh topology

In this paper, we propose a mesh-topology-based multi-hop teleportation scheme for a quantum net- work. By using the proposed scheme, quantum communication can be realized between two arbitrary nodes, even when they do not share a direct quantum channel. Einstein-Podolsky-Rosen pairs are used as quantum channels. The source node （initial sender） and all intermediate nodes make Bell measurements independently. They send the results to the destination node （final receiver） by classical channels. The quantum state can be determined from the Bell measurement result, and only the desti- nation node is required for simple unitary transformation. This method of simultaneous measurement contributes significantly to quantum network by reducing the hop-by-hop transmission delay.

A new method of quality improvement for quadrilateral mesh based on small polygon reconnection

In this paper, a new method of topological cleanup for quadrilateral mesh is presented. The method first selects a patch of mesh around an irregular node. It then seeks the best connection of the selected patch according to its irregular valence using a new topological operation： small polygon reconnection （SPR）. By replacing the original patch with an optimal one that has less irregular valence, mesh quality can be improved. Three applications based on the proposed approach are enumerated： （1） improving the quality of a quadrilateral mesh, （2） converting a triangular mesh to a quadrilateral one, and （3） adapting a triangle generator to a quadrilateral one. The presented method is highly effective in all three applications.

CONTOUR EXTRACTION AND FEATURE POINT DETECTION FOR 3-D FRAGMENT REASSEMBLY

An approach to contour extraction and feature point detection in the 3-D fragment reassembly is proposed. A simple and effective technique is used for building the intrinsic topology of the fragment data suitable for contour extraction. For the scanned data in which the topology is difficult to be achieved, the corresponding solutions are given to manage this problem. A robust approach is used for the curvature and torsion calculation of the discrete contour in a 3-D space. Finally, a method is developed for detecting feature points of the fragment contour based on total curvature. Therefore, the contour description combines the simple global information with local feature points. Experiments with real contour curves extracted from 3-D fragments demonstrate that the proposed method is robust and efficient.

COMPLEX SURFACE RECONSTRUCTION BASED ON OBJECT-ORIENTED DEVELOPING TOOL VBA

Taking AutoCAD2000 as platform, an algorithm for the reconstruction ofsurface from scattered data points based on VBA is presented. With this core technology customerscan be free from traditional AutoCAD as an electronic board and begin to create actual presentationof real-world objects. VBA is not only a very powerful tool of development, but with very simplesyntax. Associating with those solids, objects and commands of AutoCAD 2000, VBA notably simplifiesprevious complex algorithms, graphical presentations and processing, etc. Meanwhile, it can avoidappearance of complex data structure and data format in reverse design with other modeling software.Applying VBA to reverse engineering can greatly improve modeling efficiency and facilitate surfacereconstruction.

The ICM method with objective function transformed by variable discrete condition for continuum structure

ICM （Independent Continuous Mapping） method can solve topological optimization problems with the minimized weight as the objective and subjected to displacement constraints. To get a clearer topological configuration, by introducing the discrete condition of topological variables and integrating with the original objective, an optimal model with multi-objectives is formulated to make the topological variables approach 0 or 1 as near as possible, and the model reduces the effect of deleting rate on the result. The image-filtering method is employed to eliminate the checkerboard patterns and mesh dependence that occurred in the topology optimization of a continuum structure. The computational efficiency is enhanced through selecting quasi-active displacement constraints and a design region. Numerical examples indicate that this algorithm is robust and practicable, though the number of iterations is slightly increased with respect to the original algorithm.

A survey of routing algorithm for mesh Network-on-Chip

With the rapid development of semiconductor in- dustry, the number of cores integrated on chip increases quickly, which brings tough challenges such as bandwidth, scalability and power into on-chip interconnection. Under such background, Network-on-Chip （NoC） is proposed and gradually replacing the traditional on-chip interconnections such as sharing bus and crossbar. For the convenience of physical layout, mesh is the most used topology in NoC design. Routing algorithm, which decides the paths of pack- ets, has significant impact on the latency and throughput of network. Thus routing algorithm plays a vital role in a wellperformed network. This study mainly ：focuses on the routing algorithms of mesh NoC. By whether taking network information into consideration in routing decision, routing algorithms of NoC can be roughly classified into oblivious routing and adaptive routing. Oblivious routing costs less without adaptiveness while adaptive routing is on the contrary. To combine the advantages of oblivious and adaptive routing algorithm, half-adaptive algorithms were proposed. In this paper, the concepts, taxonomy and features of routing algorithms of NoC are introduced. Then the importance of routing algorithms in mesh NoC is highlighted, and representative routing algorithms with respective features are reviewed and summarized. Finally, we try to shed light upon the future work of NoC routing algorithms.

A Resource-Efficient Communication Architecture for Chip Multiprocessors on FPGAs

Significant advances in field-programmable gate arrays （FPGAs） have made it viable to explore innovative multiprocessor solutions on a single FPGA chip. For multiprocessors, an efficient communication network that matches the needs of the target application is always critical to the overall performance. Wormhole packet-switching network-on-chip （NoC） solutions are replacing conventional shared buses to deal with scalability and complexity challenges coming along with the increasing number of processing elements （PEs）. However, the quest for high performance networks has led to very complex and resource-expensive NoC designs, leaving little room for the real computing force, i.e., PEs. Moreover, many techniques offer very small performance gains or none at all when network traffic is light while increasing the resource usage of routers. We argue that computation is still the primary task of multiprocessors and sufficient resources should be reserved for PEs. This paper presents our novel design and implementation of a resource-efficient communication network for multiprocessors on FPGAs. We reduce not only the required number of routers for a given number of PEs by introducing a new PE-router topology, but also the resource requirement of each router. Our communication network relies on the NEWS channels to transfer packets in a pipelined fashion following the path determined by the routing network, The implementation results on various Xilinx FPGAs show good performance in the typical range of network load for multiprocessor applications.