We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device stru...We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indis- pensable effects on multiple-bit upsets （MBUs）, and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence.展开更多
Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （...Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （SEU） cross sections under tilted ion strikes are overestimated by 23.9%-84.6%, compared with under normally incident ion with the equivalent linear energy transfer （LET） value of 41 MeV/（mg/cm2）, which can be partially explained by the fact that the MBU rate for tilted ions of 30° is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of - 9.5 MeV/（mg/cm2）, no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset （DBU） patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects （SEE） sensitivity, especially in MBU-sensitive devices.展开更多
Experimental evidence is presented showing obvious azimuthal dependence of single event upsets(SEU) and multiple-bit upset(MBU) patterns in radiation hardened by design(RHBD) and MBU-sensitive static random access mem...Experimental evidence is presented showing obvious azimuthal dependence of single event upsets(SEU) and multiple-bit upset(MBU) patterns in radiation hardened by design(RHBD) and MBU-sensitive static random access memories(SRAMs), due to the anisotropic device layouts. Depending on the test devices, a discrepancy from 24.5% to 50% in the SEU cross sections of dual interlock cell(DICE) SRAMs is shown between two perpendicular ion azimuths under the same tilt angle. Significant angular dependence of the SEU data in this kind of design is also observed, which does not fit the inverse-cosine law in the effective LET method. Ion trajectory-oriented MBU patterns are identified, which is also affected by the topological distribution of sensitive volumes. Due to that the sensitive volumes are periodically isolated by the BL/BLB contacts along the Y-axis direction, double-bit upsets along the X-axis become the predominant configuration under normal incidence.Predominant triple-bit upset and quadruple-bit upset patterns are the same under different ion azimuths(Lshaped and square-shaped configurations, respectively). Those results suggest that traditional RPP/IRPP model should be promoted to consider the azimuthal and angular dependence of single event effects in certain designs.During earth-based evaluation of SEE sensitivity, worst case beam direction, i.e., the worst case response, should be revealed to avoid underestimation of the on-orbit error rate.展开更多
This paper combines improved Hamming codes and parity codes to assure the reliability of memory in presence of multiple bit upsets with low cost overhead.The redundancy bits of improved Hamming codes will be appended ...This paper combines improved Hamming codes and parity codes to assure the reliability of memory in presence of multiple bit upsets with low cost overhead.The redundancy bits of improved Hamming codes will be appended at the end of data bits,which eliminates the overhead of interspersing the redundancy bits at the encoder and decoder.The reliability of memory is further enhanced by the layout architecture of redundancy bits and data bits.The proposed scheme has been implemented in Verilog and synthesized using the Synopsys tools.The results reveal that the proposed method has about 19% less area penalties and 13% less power consumption comparing with the current two-dimensional error codes,and its latency of encoder and decoder is 63% less than that of Hamming codes.展开更多
针对SRAM(Static Random Access Memory)型FPGA单粒子翻转引起软错误的问题,该文分析了单粒子单位翻转和多位翻转对布线资源的影响,提出了可以减缓软错误的物理设计方法。通过引入布线资源错误发生概率评价布线资源的软错误,并与故障传...针对SRAM(Static Random Access Memory)型FPGA单粒子翻转引起软错误的问题,该文分析了单粒子单位翻转和多位翻转对布线资源的影响,提出了可以减缓软错误的物理设计方法。通过引入布线资源错误发生概率评价布线资源的软错误,并与故障传播概率结合计算系统失效率,驱动布局布线过程。实验结果表明,该方法在不增加额外资源的情况下,可以降低系统软错误率约18%,还可以有效减缓多位翻转对系统的影响。展开更多
为提高传统纠检错(error detection and correction,EDAC)模块对星载SRAM中单粒子多位翻转(multiple bit upsets,MBU)的纠错率,提出一种能同时纠正多比特位翻转的技术,称为数据交错技术。参照版图交错法的原理,在FPGA的软件设计等级实...为提高传统纠检错(error detection and correction,EDAC)模块对星载SRAM中单粒子多位翻转(multiple bit upsets,MBU)的纠错率,提出一种能同时纠正多比特位翻转的技术,称为数据交错技术。参照版图交错法的原理,在FPGA的软件设计等级实现数据的交错存储,将单粒子的多位翻转分离后,分别通过EDAC模块纠正。仿真结果表明,该数据交错技术与(12,8)汉明码及(21,16)汉明码结合后,可将传统EDAC模块对单粒子引起的两位及三位翻转的纠错率从53.69%及28.91%提升至99.82%,以较低代价,实现了MBU大部分翻转形式的纠正。展开更多
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 11179003, 10975164, 10805062, and 11005134)
文摘We investigate the impact of heavy ion irradiation on a hypothetical static random access memory （SRAM） device. Influences of the irradiation angle, critical charge, drain-drain spacing, and dimension of device structure on the device sensitivity have been studied. These prediction and simulated results are interpreted with MUFPSA, a Monte Carlo code based on Geant4. The results show that the orientation of ion beams and device with different critical charge exert indis- pensable effects on multiple-bit upsets （MBUs）, and that with the decrease in spacing distance between adjacent cells or the dimension of the cells, the device is more susceptible to single event effect, especially to MBUs at oblique incidence.
基金supported by the National Natural Science Foundation of China(Grant Nos.11179003,10975164,10805062,and 11005134)
文摘Experimental evidence is presented relevant to the angular dependences of multiple-bit upset （MBU） rates and patterns in static random access memories （SRAMs） under heavy ion irradiation. The single event upset （SEU） cross sections under tilted ion strikes are overestimated by 23.9%-84.6%, compared with under normally incident ion with the equivalent linear energy transfer （LET） value of 41 MeV/（mg/cm2）, which can be partially explained by the fact that the MBU rate for tilted ions of 30° is 8.5%-9.8% higher than for normally incident ions. While at a lower LET of - 9.5 MeV/（mg/cm2）, no clear discrepancy is observed. Moreover, since the ion trajectories at normal and tilted incidences are different, the predominant double-bit upset （DBU） patterns measured are different in both conditions. Those differences depend on the LET values of heavy ions and devices under test. Thus, effective LET method should be used carefully in ground-based testing of single event effects （SEE） sensitivity, especially in MBU-sensitive devices.
基金Supported by National Natural Science Foundation of China(Nos.11179003,10975164,61204112 and 61204116)China Postdoctoral Science Foundation(No.2014M552170)
文摘Experimental evidence is presented showing obvious azimuthal dependence of single event upsets(SEU) and multiple-bit upset(MBU) patterns in radiation hardened by design(RHBD) and MBU-sensitive static random access memories(SRAMs), due to the anisotropic device layouts. Depending on the test devices, a discrepancy from 24.5% to 50% in the SEU cross sections of dual interlock cell(DICE) SRAMs is shown between two perpendicular ion azimuths under the same tilt angle. Significant angular dependence of the SEU data in this kind of design is also observed, which does not fit the inverse-cosine law in the effective LET method. Ion trajectory-oriented MBU patterns are identified, which is also affected by the topological distribution of sensitive volumes. Due to that the sensitive volumes are periodically isolated by the BL/BLB contacts along the Y-axis direction, double-bit upsets along the X-axis become the predominant configuration under normal incidence.Predominant triple-bit upset and quadruple-bit upset patterns are the same under different ion azimuths(Lshaped and square-shaped configurations, respectively). Those results suggest that traditional RPP/IRPP model should be promoted to consider the azimuthal and angular dependence of single event effects in certain designs.During earth-based evaluation of SEE sensitivity, worst case beam direction, i.e., the worst case response, should be revealed to avoid underestimation of the on-orbit error rate.
基金Sponsored by the Opening Project of National Key Laboratory of Science and Technology on Reliability PhysicsApplication Technology of Electrical Component(Grant No.ZHD200903)
文摘This paper combines improved Hamming codes and parity codes to assure the reliability of memory in presence of multiple bit upsets with low cost overhead.The redundancy bits of improved Hamming codes will be appended at the end of data bits,which eliminates the overhead of interspersing the redundancy bits at the encoder and decoder.The reliability of memory is further enhanced by the layout architecture of redundancy bits and data bits.The proposed scheme has been implemented in Verilog and synthesized using the Synopsys tools.The results reveal that the proposed method has about 19% less area penalties and 13% less power consumption comparing with the current two-dimensional error codes,and its latency of encoder and decoder is 63% less than that of Hamming codes.
文摘针对SRAM(Static Random Access Memory)型FPGA单粒子翻转引起软错误的问题,该文分析了单粒子单位翻转和多位翻转对布线资源的影响,提出了可以减缓软错误的物理设计方法。通过引入布线资源错误发生概率评价布线资源的软错误,并与故障传播概率结合计算系统失效率,驱动布局布线过程。实验结果表明,该方法在不增加额外资源的情况下,可以降低系统软错误率约18%,还可以有效减缓多位翻转对系统的影响。
文摘为提高传统纠检错(error detection and correction,EDAC)模块对星载SRAM中单粒子多位翻转(multiple bit upsets,MBU)的纠错率,提出一种能同时纠正多比特位翻转的技术,称为数据交错技术。参照版图交错法的原理,在FPGA的软件设计等级实现数据的交错存储,将单粒子的多位翻转分离后,分别通过EDAC模块纠正。仿真结果表明,该数据交错技术与(12,8)汉明码及(21,16)汉明码结合后,可将传统EDAC模块对单粒子引起的两位及三位翻转的纠错率从53.69%及28.91%提升至99.82%,以较低代价,实现了MBU大部分翻转形式的纠正。
