Single Event Transients of Operational Amplifier and Optocoupler

The single event transient effects of the operational amplifier LM124J and the optocoupler HCPL 5231 are investigated by a pulsed laser test facility. The relation of transient pulse shape to pulsed laser equivalent LET is tested,the sensitive areas of the SET effects are identified in voltage follower application mode of LM124J, and the mechanism is initially analyzed. The transient amplitude and duration of HCPL5231 at various equivalent LET are examined,and the SET cross-section is measured. The results of our test and heavy ion experimental data coincide closely,indicating that a pulsed laser test facility is a valid tool for single event effect evaluation.

Active Damping of Milling Vibration Using Operational Amplifier Circuit

The problem of chatter vibration is associated with adverse consequences that often lead to tool impairment and poor surface finished in a workpiece, and thus, controlling or suppressing chatter vibrations is of great significance to improve machining quality. In this paper, a workpiece and an actuator dynamics are considered in modeling and controller design. A proportional-integral controller(PI) is presented to control and actively damp the chatter vibration of a workpiece in the milling process. The controller is chosen on the basis of its highly stable output and a smaller amount of steady-state error. The controller is realized using analog operational amplifier circuit. The work has contributed to planning a novel approach that addresses the problem of chatter vibration in spite of technical hitches in modeling and controller design. The method can also lead to considerable reduction in vibrations and can be beneficial in industries in term of cost reduction and energy saving. The application of this method is verified using active damping device actuator(ADD) in the milling of steel.

A Three-Stage Operational Amplifier for a Wide Range of Capacitive Loads

This paper presents a three-stage CMOS operational amplifier （opamp） that combines accuracy with stability for a wide range of capacitive loads. A so-called quenching capacitor is added to a multipath nested Miller compensation （MNMC） topology to obtain stability for a wide range of capacitive loads. Theoretical analysis and mathematical formulas are provided to prove the improvement in stability. A prototype of this frequency compen- sation scheme is implemented in a 0.7μm CMOS process. Measurement′s show that the amplifier can drive capaci- tive loads ranging from 100pF to 100/μF with a gain of 90dB and a minimum phase margin of 26°. The amplifier has a unity-gain bandwidth of 1MHz for a 100pF capacitive load. It employs a quenching capacitance of 18pF.

Low-Power Operational Amplifier for Real-Time Signal Processing System of Micro Air Vehicle

A low-power complementary metal oxide semiconductor（CMOS） operational amplifier （op-amp） for real-time signal processing of micro air vehicle （MAV） is designed in this paper.Traditional folded cascode architecture with positive channel metal oxide semiconductor（PMOS） differential input transistors and sub-threshold technology are applied under the low supply voltage.Simulation results show that this amplifier has significantly low power,while maintaining almost the same gain,bandwidth and other key performances.The power required is only 0.12 mW,which is applicable to low-power and low-voltage real-time signal acquisition and processing system.

Symbolic Macromodeling for Statistical Simulation of Operational Amplifiers

Symbolic circuit simulator is traditionally applied to the small-signal analysis of analog circuits. This paper establishes a symbolic behavioral macromodeling method applicable to both small-signal and large-signal analysis of general two-stage operational amplifiers （op-amps）. The proposed method creates a two-pole parametric macromodel whose parameters are analytical functions of the circuit element parameters generated by a symbolic circuit simulator. A moment matching technique is used in deriving the analytical model parameter. The created parametric behavioral model can be used for op-amps performance simulation in both frequency and time domains. In particular, the parametric models are highly suited for fast statistical simulation of op-amps in the time-domain. Experiment results show that the statistical distributions of the op-amp slew and settling time characterized by the proposed model agree well with the transistor-level results in addition to achieving significant speedup.

Efficient Slew-Rate Enhanced Operational Transconductance Amplifier

Today, along with the prevalent use of portable equipment, wireless, and other battery powered systems, the demand for amplifiers with a high gain-bandwidth product（GBW）, slew rate（SR）, and at the same time very low static power dissipation is growing. In this work, an operational transconductance amplifier（OTA） with an enhanced SR is proposed. By inserting a sensing resistor in the input port of the current mirror in the OTA, the voltage drop across the resistor is converted into an output current containing a term in proportion to the square of the voltage, and then the SR of the proposed OTA is significantly enhanced and the current dissipation can be reduced. The proposed OTA is designed and simulated with a 0.5μm complementary metal oxide semiconductor（CMOS） process. The simulation results show that the SR is 4.54V/μs, increased by 8.25 times than that of the conventional design, while the current dissipation is only 87.3%.

Optimization and design of inter-stage amplifier with wide output swing,high speed and high accuracy

To satisfy the design requirements of analog-to-digital converter （ADC） of high speed sampling system in an infrared focal plane array tester with 1024 × 1024 pixels, a first inter-stage amplifier of 12-bit 40- Msample/s pipelined ADC was designed with 0. 35 μm CMOS technology. On the basis of traditional two-stage amplifier, the cross-coupled class AB output stage and cascode compensation were adopted to improve the output vohage swing and bandwidth. Power dissipation was optimized with math tools. Circuit and layout design were completed. Simulation results show that the designed amplifier has good performance of 95 dB dc gain, ±2 V output voltage swing, 190 MHz bandwidth and 63° phase margin with feedback factor 1/4, 33 mW power dissipation and so on, which can meet the system requirements.

Design of an OP-AMP Based on a LDO Regulator

An operational amplifier （OP-AMP） with a ground current of about 0.6μA is presented. Moreover, this amplifier reaps the benefits of incorporating a foldback current limiting circuit,which enables the low-dropout voltage regulator without the need of a special current limiting subblock. Therefore,the object of ultra-low power is realized because of a great reduction in transistors and current limbs.

A High Precision CMOS Opamp Suitable for ISFET Readout

This paper presents a high precision CMOS opamp suitable for ISFET readout. The opamp is tailored to provide a constant bias condition for ISFET as part of the readout circuits and,hence,is compatible for single chip integration with the sensor. A continuous time auto-zero stabilization technique is studied and employed, with the aim of suppressing the low frequency noises, including the offset voltage, 1/f noise, and temperature drift. The design is based on a 0.35μm CMOS process. With a 3.3V power supply,it maintains a DC open loop gain of more than 100dB and an offset voltage of around 11μV,while the overall power dissipation is only 1.48mW. With this opamp, a pH microsensor is constructed, of which the functionality is verified by experimental tests.

An 80dB Dynamic Range ΣΔ Modulator for Low-IF GSM Receivers

A high-resolution,200kHz signal bandwidth,third-order single-loop single-bit ε△ modulator used in low-IF GSM receivers is presented. The modulator is implemented with fully differential switched capacitor circuits in standard 0. 6μm 2P2M CMOS technology. The modulator uses two balanced reference voltages of ±1V,and is driven by a single 26MHz clock signal. The measurement results show that,with an oversampling ratio of 64, the modulator achieves an 80.6dB dynamic range,a 71.8dB peak SNDR,and a 73.9dB peak SNR in the signal bandwidth of 200kHz. The modulator dissipates 15mW static power from a single 5V supply.

Analysis and design of high linearity current reference for current mode circuits

A complementary metal-oxide-semiconductor transistor （CMOS） voltage-to-current（VTC）converter with high linearity for current-mode analog and digital integrated circuits is described. A high gain operational amplifier （OPA） is utilized to form negative feedback. A proportional to absolute temperature （PTAT） current reference with transistors operated in a weak inversion is used as the bias circuit. The resistor and the OPA nonlinearity behavior are analyzed in detail. By optimizing parameters in OPA and adopting a small voltage coefficient polysilicon resistor as a linear device, a high linearity is achieved. The circuit is implemented in a standard 0. 6 μm CMOS technology. The low frequency gain of the OPA exceeds 90 dB. The test results indicate that the total harmonic distortion （THD）is 0. 000 2%. The common-mode input linearity range is 0 to 2. 6 V. Correspondingly, the output current range is 50 to 426μA. The sensitivity of the PTAT current reference to Vdd is approximately 0. 021 7. The chip consumes a power of less than 1.3 mW for a 5 V supply, and occupies an area of 0. 112 mm^2.

Area-Efficient Low Power CMOS Image Sensor Readout Circuit with Fixed Pattern Noise Cancellation

A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissi...

Design of Photoelectric Detection Circuit in Linear Measuring System

The structure,equivalent circuit,noise sources of silicon photodiode are analyzed.In order to improve the measuring linearity,we must choose the silicon photodiode with a large R d,small R s and I 0 and under an operation state of output short-circuit.We must let the operation amplifier work in the current-voltage transfer form.Also we analyzed the effects of the input noise voltage,the input noise current,the input offset voltage,the input offset current of the operation amplifier and the noises of the silicon photodiode on the combined circuit of the operation amplifier with the silicon photodiode.Considering these factors,we can design the detective circuit with high response,sensitivity,stability,linearity and SNR .

Fully-Differential Multichannel Integrated Neural Signal Recording Front-End

Neural signal can be used for clinical disease diagnosis,data analysis and real-time life signal monitoring.Its analysis requires high-performance signal processors.Based on the 180 nm standard CMOS technology,a16-channel fully-differential neural recording chip is designed.The chip consists of 16-channel low-noise pre-amplifiers,a multiplexer and a successive approximation register（SAR）ADC.The result shows that the equivalent input-referred noise of recording amplifier is 3.63μV,bringing down noise efficiency factor to 4.24.At 8.5 bits effective number of bit（ENOB）,the analog-to-digital converter（ADC）has an SNR of 52.6dB.The core area of the proposed neural recording front-end is about 2.46 mm^2.

Simple Simulated Inductor, Low-Pass/Band-Pass Filter and Sinusoidal Oscillator Using OTRA

Although a variety of applications of the OTRAs have been reported in literature, the pole of the transresistance gain Rm of the OTRA has been usually considered to affect the performance of the circuits due to being parasitic. In this paper, the pole of the OTRA has been used to evolve some simple OTRA-based active-R circuits for realizing a synthetic inductor, single resistance controlled oscillator and low-pass/band-pass filter. The workability of all the proposed circuits has been verified by SPICE simulations and all the new circuits have been found to work as predicted by theory. The exemplary propositions suggest that it is worthwhile to further investigate new circuit designs using OTRA-pole.

国外模拟集成电路近期发展动态

近年来,由于器件工艺水平的提高和电路设计技术的改进,模拟集成电路获得了很大的发展。席卷世界先进工业国家的三“A”革命(工厂自动化、办公室自动化和家庭自动化)和各种高精尖的军事装备,使品种繁多的模拟电路找到了用武之地。目前,国外半导体厂家正在竞相开发新的品种,并且不断扩大其应用范围,本文拟对应用比较广泛的几种主要模拟集成电路在国外的发展情况作一简单介绍。

Computer-aided Symbolic Analysis for the Active Network

The totally coded method (TCM) reveal the same law which governing the gain calculating for signal flow graph as Mason formula does. This algorithm is carried out merely in the domain of code operation. Based on pure code algorithm, it is more efficiency because any figure searching is no longer necessary. The code-series (CS), which are organized from node association table, have the holo-information nature, so that both the content and the sign of each gain-term can be determined via the coded method. The principle of this method is obvious and it is suited for computer programming. The capability of the computer-aided analysis for the active network, such as operation amplifier network, can be enhanced.

DOCCII-based electronically tunable current-mode biquadratic filters

A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.

A low power quadrature up-conversion mixer for WSN application

This paper presents an up-conversion mixer for 2.4GHz wireless sensor networks in 0. 181xm RF complementary metal-oxide semiconductor （CMOS） technology. It is based on a double-balanced Gilbert cell type. With two Gilbert cells it was applied quadrature modulation. Operational ampli- tiers are used in this design to improve the conversion gain under low power consumption. The mixer design is based on 0.18txm RF CMOS process. And the mixer test results indicate that under 1.8V power supply, with input frequency 2.4 - 2.4835GHz, the conversion voltage gain is 1.2 - 2dB. When the output frequency is 2.4GHz, its power gain is -4.46dB, and its input referred 1 dB com- pression point is -11.5dBm and it consumes 1.77mA current.

CMOS Realization of VDVTA and OTA Based Fully Electronically Tunable First Order All Pass Filter with Optimum Linearity at Low Supply Voltage ±0.85 V

This paper presents a new first order all pass filter configurations. The proposed all pass filter configuration employs two configurations namely VDVTA and OTAs based first order all pass filter configuration. The first proposed configuration employs a single VDVTA and one grounded capacitor whereas the second proposed configuration employs two OTAs and one grounded capacitor. Both types of proposed configurations are fully electronically tunable and their quality factors do not depend on tunable pole frequency range. The reported configurations yield low active and passive sensitivities and also have low power consumption with very low supply voltage ± 0.85 V with Bias Voltage ± 0.50 V. The PSPICE simulation of the proposed VDVTA and two OTAs based first order all pass filter configurations are verified using 0.18 μm CMOS Technology Process Parameters.