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The Observation on Efficacy of Angio-seal Closure Device in the Femoral Arterial Puncture Site after PCI
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作者 张斌 靳立军 +5 位作者 魏水生 方咸宏 乌汉东 董太明 严红 廖洪涛 《South China Journal of Cardiology》 CAS 2006年第1期56-58,共3页
Objective To evaluate reliability and safety of Angio-seal hemostasis device applied to the femoral arterial puncture site after percutaneous coronary intervention (PCI). Methods In 40 patients after PCI in our inst... Objective To evaluate reliability and safety of Angio-seal hemostasis device applied to the femoral arterial puncture site after percutaneous coronary intervention (PCI). Methods In 40 patients after PCI in our institute during the period between May 2002 and December 2003, Angioseal device were used to seal the femoral arterial puncture site. Results All the Angioseal devices were successfully deployed in 40 patients (successful rate: 100%); the mean time to hemostasis was 45±12 sec; the mean time to ambulate after angioseal closure was 1.9±0.5 hours. No major groin and systemic complication was observed. There was minor groin oozing in 2 cases and small hemotoma in 1 patient. Conclusions Angio-seal closure device of the femoral artery puncture site after a percutaneous coronary procedure is safe. It can shorten the time to hemostasis, leads to early mobilization, and reduce groin complication. The disadvantage is relatively expensive. 展开更多
关键词 Angioseal device pci Hemostasis
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Design of shared bus DSP board in vector network analyzer
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作者 刘丹 王保锐 《Journal of Measurement Science and Instrumentation》 CAS 2013年第4期317-320,共4页
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network anal... Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed. 展开更多
关键词 shared bus host port interface(HPI) external memory interface(EMIF) field programmable gate array(FPGA) peripherical component interconnect(pci)interface device
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