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A REASONABLE METHOD FOR CONSTRACTING GENERAL ELEMENT DM4 OF THICK AND THIN PLATE WITH EFFECTUAL AND REALIABLE NUMERICAL SOLUTIONS
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作者 杨连 《Applied Mathematics and Mechanics(English Edition)》 SCIE EI 1999年第3期319-327,共9页
In this thesis, the interal relations between about shear looking, zero energy mode and patch test are studied, and a reasonable method provided for building general element of thick and thin plate with effectual and ... In this thesis, the interal relations between about shear looking, zero energy mode and patch test are studied, and a reasonable method provided for building general element of thick and thin plate with effectual and realiable numerical solution. 展开更多
关键词 shear looking zero energy mode path test consistent constraint condition reasonable Kirchhoff constraint
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Exploiting Deterministic TPG for Path Delay Testing
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作者 李晓维 PaulY.S.Cheung 《Journal of Computer Science & Technology》 SCIE EI CSCD 2000年第5期472-479,共8页
Detection of path delay faults requires two-pattern tests. BIST technique provides a low-cost test solution. This paper proposes an approach to designing a cost-effective deterministic test pattern generator (TPG) for... Detection of path delay faults requires two-pattern tests. BIST technique provides a low-cost test solution. This paper proposes an approach to designing a cost-effective deterministic test pattern generator (TPG) for path delay testing. Given a set of pre-generated test-pairs with pre-determined fault coverage, a deterministic TPG is synthesized to apply the given test-pair set in a limited test time. To achieve this objective, configurable linear feedback shift register (LFSR) structures are used. Techniques are developed to synthesize such a TPG, which is used to generate an unordered deterministic test-pair set. The resulting TPG is very efficient in terms of hardware size and speed performance. Simulation of academic benchmark circuits has given good results when compared to alternative solutions. 展开更多
关键词 built-in self-test (BIST) path delay testing deterministic TPG configurable LFSR
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Deterministic Circular Self Test Path 被引量:2
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作者 文科 胡瑜 李晓维 《Tsinghua Science and Technology》 SCIE EI CAS 2007年第S1期20-25,共6页
Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test applic... Circular self test path (CSTP) is an attractive technique for testing digital integrated circuits(IC) in the nanometer era, because it can easily provide at-speed test with small test data volume and short test application time. However, CSTP cannot reliably attain high fault coverage because of difficulty of testing random-pattern-resistant faults. This paper presents a deterministic CSTP (DCSTP) structure that consists of a DCSTP chain and jumping logic, to attain high fault coverage with low area overhead. Experimental re- sults on ISCAS’89 benchmarks show that 100% fault coverage can be obtained with low area overhead and CPU time, especially for large circuits. 展开更多
关键词 very large scale integration (VLSI) test built-in-self-test (BIST) circular self test path DETERMINISTIC
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A Complete Critical Path Algorithm for Test Generation of Combinational Circuits
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作者 周权 魏道政 《Journal of Computer Science & Technology》 SCIE EI CSCD 1991年第1期74-82,共9页
It is known that critical path test generation method is not a complete algorithm for combinational circuits with reconvergent-fanout.In order to make it a complete algorithm,we put forward a reconvergent-fanout- orie... It is known that critical path test generation method is not a complete algorithm for combinational circuits with reconvergent-fanout.In order to make it a complete algorithm,we put forward a reconvergent-fanout- oriented technique,the principal critical path algorithm,propagating the critical value back to primary inputs along a single path,the principal critical path,and allowing multiple path sensitization if needed.Relationship among test patterns is also discussed to accelerate test generation. 展开更多
关键词 path A Complete Critical path Algorithm for Test Generation of Combinational Circuits TEST
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Code Based Analysis for Object-Oriented Systems
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作者 Swapan Bhattacharya Ananya Kanjilal 《Journal of Computer Science & Technology》 SCIE EI CSCD 2006年第6期965-972,共8页
Tile basic features of object-oriented software makes it difficult to apply traditional testing methods in objectoriented systems. Control Flow Graph (CFG) is a well-known model used for identification of independen... Tile basic features of object-oriented software makes it difficult to apply traditional testing methods in objectoriented systems. Control Flow Graph (CFG) is a well-known model used for identification of independent paths in procedural software. This paper highlights the problem of constructing CFG in object-oriented systems and proposes a new model named Extended Control Flow Graph (ECFG) for code based analysis of Object-Oriented (OO) software. ECFG is a layered CFG where nodes refer to methods rather than statements. A new metrics Extended Cyclomatic Complexity (E-CC) is developed which is analogous to McCabe's Cyclomatic Complexity (CC) and refers to the number of independent execution paths within the OO software. The different ways in which CFG's of individual methods are connected in an ECFG are presented and formulas for E-CC for these different cases are proposed. Finally we have considered an example in Java and based on its ECFG, applied these cases to arrive at the E-CC of the total system as well as proposed a methodology for calculating the basis set, i.e., the set of independent paths for the OO system that will help in creation of test cases for code testing. 展开更多
关键词 object-oriented testing extended control flow graph extended cyclomatic complexity test paths graph-based testing
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