A three-part comb decimator is presented in this paper, for the applications with severe requirements of circuit performance and frequency response. Based on the modified prime factorization method and multistage poly...A three-part comb decimator is presented in this paper, for the applications with severe requirements of circuit performance and frequency response. Based on the modified prime factorization method and multistage polyphase decomposition, an efficient non-recursive structure for the cascaded integrator-comb （CIC） decimation filter is derived. Utilizing this structure as the core part, the proposed comb decimator can not only loosen the decimation ratio＇s limitation, but also balance the tradeoff among the overall power consumption, circuit area and maximum speed. Further, to improve the frequency response of the comb decimator, a cos-prefilter is introduced as the preprocessing part for increasing the aliasing rejection, and an optimum sin-based filter is used as the compensation part for decreasing the passband droop.展开更多
基金Supported by the China Postdoctoral Science Foundation （20080431379）.
文摘A three-part comb decimator is presented in this paper, for the applications with severe requirements of circuit performance and frequency response. Based on the modified prime factorization method and multistage polyphase decomposition, an efficient non-recursive structure for the cascaded integrator-comb （CIC） decimation filter is derived. Utilizing this structure as the core part, the proposed comb decimator can not only loosen the decimation ratio＇s limitation, but also balance the tradeoff among the overall power consumption, circuit area and maximum speed. Further, to improve the frequency response of the comb decimator, a cos-prefilter is introduced as the preprocessing part for increasing the aliasing rejection, and an optimum sin-based filter is used as the compensation part for decreasing the passband droop.
