Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an ...Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an available countermeasure based on randomization is proposed in this paper. Time delay is inserted in the operation process and random number is precharged to the circuit during the delay time,the normal schedule is disturbed and the power is randomized. Following this meth-odology,a general DPA resistance random precharge architecture is proposed and DES algorithm following this architecture is implemented. This countermeasure is testified to be efficient to resist DPA.展开更多
This is a paper of analysis and research dealing with the dynamic process and pattern offibre in an electrostatic field. The paper first discusses the distribution of the electric field in spaceand describes in detail...This is a paper of analysis and research dealing with the dynamic process and pattern offibre in an electrostatic field. The paper first discusses the distribution of the electric field in spaceand describes in detail the various manners of electrification of fibres and the changing patternbefore and after their entrance into the field. It then introduces the gravity of the fibre and theforce of the airflow transporting the fibre, and finally, a group of motion equations from thefibre are derived. Replacing the parameters in the equations with the experimental data, the nu-merical solutions can be obtained and the motion loci in different environments will be drawn bythe computer. The loci conform basically with the results obtained by stroboflash photography.展开更多
A novel DOIND logic approach is proposed for domino logic, which reduces the leakage current with a minimum delay penalty. Simulation is performed at 70 nm technology node with supply voltage 1V for domino logic and D...A novel DOIND logic approach is proposed for domino logic, which reduces the leakage current with a minimum delay penalty. Simulation is performed at 70 nm technology node with supply voltage 1V for domino logic and DOIND logic based AND, OR, XOR and Half Adder circuits using the tanner EDA tool. Simulation results show that the proposed DOIND approach decreases the average leakage current by 68.83%, 66.6%, 77.86% and 74.34% for 2 input AND, OR, XOR and Half Adder respectively. The proposed approach also has 47.76% improvement in PDAP for the buffer circuit as compared to domino logic.展开更多
文摘Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an available countermeasure based on randomization is proposed in this paper. Time delay is inserted in the operation process and random number is precharged to the circuit during the delay time,the normal schedule is disturbed and the power is randomized. Following this meth-odology,a general DPA resistance random precharge architecture is proposed and DES algorithm following this architecture is implemented. This countermeasure is testified to be efficient to resist DPA.
文摘This is a paper of analysis and research dealing with the dynamic process and pattern offibre in an electrostatic field. The paper first discusses the distribution of the electric field in spaceand describes in detail the various manners of electrification of fibres and the changing patternbefore and after their entrance into the field. It then introduces the gravity of the fibre and theforce of the airflow transporting the fibre, and finally, a group of motion equations from thefibre are derived. Replacing the parameters in the equations with the experimental data, the nu-merical solutions can be obtained and the motion loci in different environments will be drawn bythe computer. The loci conform basically with the results obtained by stroboflash photography.
文摘A novel DOIND logic approach is proposed for domino logic, which reduces the leakage current with a minimum delay penalty. Simulation is performed at 70 nm technology node with supply voltage 1V for domino logic and DOIND logic based AND, OR, XOR and Half Adder circuits using the tanner EDA tool. Simulation results show that the proposed DOIND approach decreases the average leakage current by 68.83%, 66.6%, 77.86% and 74.34% for 2 input AND, OR, XOR and Half Adder respectively. The proposed approach also has 47.76% improvement in PDAP for the buffer circuit as compared to domino logic.
