Conventional ultrashort pulsewidth measurement technology is autocorrelation based on second-harmonic generation;however,nonlinear crystals and bulky components are required,which usually leads to the limited waveleng...Conventional ultrashort pulsewidth measurement technology is autocorrelation based on second-harmonic generation;however,nonlinear crystals and bulky components are required,which usually leads to the limited wavelength range and the difficult adjustment with free-space light alignment.Here,we proposed a compact all-fiber pulsewidth measurement technology based on the interference jitter(IJ)and field-programmable gate array(FPGA)platform,without requiring a nonlinear optical device(e.g.nonlinear crystal/detector).Such a technology shows a wide measurement waveband from 1 to 2.15μm at least,a pulsewidth range from femtoseconds to 100 ps,and a small relative error of 0.15%-3.8%.In particular,a minimum pulse energy of 219 fj is experimentally detected with an average-power-peak-power product of 1.065×10^(-6)W^(2).The IJ-FPGA technology may offer a new route for miniaturized,user-friendly,and broadband pulsewidth measurement.展开更多
In this paper, the design and verification process of an automobile-engine-fan control system on chip （SoC） are introduced. The SoC system, SHU-MV08, reuses four new intellectual property （IP） cores and the design...In this paper, the design and verification process of an automobile-engine-fan control system on chip （SoC） are introduced. The SoC system, SHU-MV08, reuses four new intellectual property （IP） cores and the design flow is accomplished with 0.35 btm chartered CMOS technology. Some special functions of IP cores, the detailed integration scheme of four IP cores, and the verification method of the entire SoC are presented. To settle the verification problems brought by analog IP cores, NanoSim based chip-level mixed-signal verification method is introduced. The verification time is greatly reduced and the first tape-out achieves success which proves the validity of our design.展开更多
基金This work was supported by the National Science Fund for Excellent Young Scholars(No.62022069)the Fundamental Research Funds for the Central Universities(No.20720200068)the Shenzhen Science and Technology Project(No.JCYJ20210324115813037).
文摘Conventional ultrashort pulsewidth measurement technology is autocorrelation based on second-harmonic generation;however,nonlinear crystals and bulky components are required,which usually leads to the limited wavelength range and the difficult adjustment with free-space light alignment.Here,we proposed a compact all-fiber pulsewidth measurement technology based on the interference jitter(IJ)and field-programmable gate array(FPGA)platform,without requiring a nonlinear optical device(e.g.nonlinear crystal/detector).Such a technology shows a wide measurement waveband from 1 to 2.15μm at least,a pulsewidth range from femtoseconds to 100 ps,and a small relative error of 0.15%-3.8%.In particular,a minimum pulse energy of 219 fj is experimentally detected with an average-power-peak-power product of 1.065×10^(-6)W^(2).The IJ-FPGA technology may offer a new route for miniaturized,user-friendly,and broadband pulsewidth measurement.
基金Project supported by the IC Special Foundation of Shanghai Municipal Commission of Science and Technology (Grant No.09706201300)the Shanghai Municipal Commission of Economic and Information (Grant No.090344)the Shanghai High-Tech Industrialization of New Energy Vehicles (Grant No.09625029),and the Graduate Innovation Foundation of Shanghai University
文摘In this paper, the design and verification process of an automobile-engine-fan control system on chip （SoC） are introduced. The SoC system, SHU-MV08, reuses four new intellectual property （IP） cores and the design flow is accomplished with 0.35 btm chartered CMOS technology. Some special functions of IP cores, the detailed integration scheme of four IP cores, and the verification method of the entire SoC are presented. To settle the verification problems brought by analog IP cores, NanoSim based chip-level mixed-signal verification method is introduced. The verification time is greatly reduced and the first tape-out achieves success which proves the validity of our design.
文摘应用B&K3560C数据采集分析系统,在大型消声测试水池中对水声材料低频隔声特性进行了测定,并提出了发射脉宽和分析脉宽的概念.实验结果表明,在信号分析处理中采用预采分析方法,针对不同测试频率,采用不同发射脉宽和分析脉宽,可提高低频测试精度,从而突破传统做法对测试频率的限制,最低有效测试频率可达500 Hz.
