Next Generation Transcriptome Sequencing and Quantitative Real-Time PCR Technologies for Characterisation of the Bemisia tabaci Asia 1 mtCOI Phylogenetic Clade

A programme of functional genomics research is underway at the University of Greenwich,UK,to develop and apply genomics technologies to characterise an economically-important but under-researched Bemisia tabaci（Hemiptera：Aleyrodidae）,the Asia 1 mtCOI phylogenetic group.A comparison of this putative species from India with other important B.tabaci populations and insect species may provide targets for the development of more effective whitefly control strategies.As a first step,next-generation sequencing（NGS）has been used to survey the transcriptome of adult female whitefly,with high quality RNA preparations being used to generate cDNA libraries for NGS using the Roche 454 Titanium DNA sequencing platform.Contig assemblies constructed from the resultant sequences（301 094 reads）using the software program CLC Genomics Workbench generated 3 821 core contigs.Comparison of a selection of these contigs with related sequences from other B.tabaci genetic groups has revealed good alignment for some genes（e.g.,HSP90）but misassemblies in other datasets（e.g.,the vitellogenin gene family）,highlighting the need for manual curation as well as collaborative international efforts to obtain accurate assemblies from the existing next generation sequence datasets.Nevertheless,data emerging from the NGS has facilitated the development of accurate and reliable methods for analysing gene expression based on quantitative real-time RT-PCR,illustrating the power of this approach to enable rapid expression analyses in an organism for which a complete genome sequence is currently lacking.

Prediction of corrosion rate for friction stir processed WE43 alloy by combining PSO-based virtual sample generation and machine learning

The corrosion rate is a crucial factor that impacts the longevity of materials in different applications.After undergoing friction stir processing(FSP),the refined grain structure leads to a notable decrease in corrosion rate.However,a better understanding of the correlation between the FSP process parameters and the corrosion rate is still lacking.The current study used machine learning to establish the relationship between the corrosion rate and FSP process parameters(rotational speed,traverse speed,and shoulder diameter)for WE43 alloy.The Taguchi L27 design of experiments was used for the experimental analysis.In addition,synthetic data was generated using particle swarm optimization for virtual sample generation(VSG).The application of VSG has led to an increase in the prediction accuracy of machine learning models.A sensitivity analysis was performed using Shapley Additive Explanations to determine the key factors affecting the corrosion rate.The shoulder diameter had a significant impact in comparison to the traverse speed.A graphical user interface(GUI)has been created to predict the corrosion rate using the identified factors.This study focuses on the WE43 alloy,but its findings can also be used to predict the corrosion rate of other magnesium alloys.

Identifying Materials of Photographic Images and Photorealistic Computer Generated Graphics Based on Deep CNNs

Currently,some photorealistic computer graphics are very similar to photographic images.Photorealistic computer generated graphics can be forged as photographic images,causing serious security problems.The aim of this work is to use a deep neural network to detect photographic images(PI)versus computer generated graphics(CG).In existing approaches,image feature classification is computationally intensive and fails to achieve realtime analysis.This paper presents an effective approach to automatically identify PI and CG based on deep convolutional neural networks(DCNNs).Compared with some existing methods,the proposed method achieves real-time forensic tasks by deepening the network structure.Experimental results show that this approach can effectively identify PI and CG with average detection accuracy of 98%.

Simulation of large-scale numerical substructure in real-time dynamic hybrid testing

A solution scheme is proposed in this paper for an existing RTDHT system to simulate large-scale finite element （FE） numerical substructures. The analysis of the FE numerical substructure is split into response analysis and signal generation tasks, and executed in two different target computers in real-time. One target computer implements the response analysis task, wherein a large time-step is used to solve the FE substructure, and another target computer implements the signal generation task, wherein an interpolation program is used to generate control signals in a small time-step to meet the input demand of the controller. By using this strategy, the scale of the FE numerical substructure simulation may be increased significantly. The proposed scheme is initially verified by two FE numerical substructure models with 98 and 1240 degrees of freedom （DOFs）. Thereafter, RTDHTs of a single frame-foundation structure are implemented where the foundation, considered as the numerical substructure, is simulated by the FE model with 1240 DOFs. Good agreements between the results of the RTDHT and those from the FE analysis in ABAQUS are obtained.

TIME-DOMAIN INTERPOLATION ON GRAPHICS PROCESSING UNIT

The signal processing speed of spectral domain optical coherence tomography(SD-OCT)has become a bottleneck in a lot of medical applications.Recently,a time-domain interpolation method was proposed.This method can get better signal-to-noise ratio(SNR)but much-reduced signal processing time in SD-OCT data processing as compared with the commonly used zeropadding interpolation method.Additionally,the resampled data can be obtained by a few data and coefficients in the cutoff window.Thus,a lot of interpolations can be performed simultaneously.So,this interpolation method is suitable for parallel computing.By using graphics processing unit(GPU)and the compute unified device architecture(CUDA)program model,time-domain interpolation can be accelerated significantly.The computing capability can be achieved more than 250,000 A-lines,200,000 A-lines,and 160,000 A-lines in a second for 2,048 pixel OCT when the cutoff length is L=11,L=21,and L=31,respectively.A frame SD-OCT data(400A-lines×2,048 pixel per line)is acquired and processed on GPU in real time.The results show that signal processing time of SD-OCT can befinished in 6.223 ms when the cutoff length L=21,which is much faster than that on central processing unit(CPU).Real-time signal processing of acquired data can be realized.

Partitioned k-Exclusion Real-Time Locking Protocol Motivated by Multicore Multi-GPU Systems

Graphic processing units （GPUs） have been widely recognized as cost-efficient co-processors with acceptable size, weight, and power consumption. However, adopting GPUs in real-time systems is still challenging, due to the lack in framework for real-time analysis. In order to guarantee real-time requirements while maintaining system utilization ~in modern heterogeneous systems, such as multicore multi-GPU systems, a novel suspension-based k-exclusion real-time locking protocol and the associated suspension-aware schedulability analysis are proposed. The proposed protocol provides a synchronization framework that enables multiple GPUs to be efficiently integrated in multicore real-time systems. Comparative evaluations show that the proposed methods improve upon the existing work in terms of schedulability.

GPU-based leaves contour generation algorithm

The implementation and optimization of the traditional contour generation algorithms are always proposed for the common processor. When processing high resolution images, the performance often exists low efficiency. A new graphics processing unit （GPU）-based algorithm is proposed to get the clear and integrated contour of leaves. Firstly we implement the classic Sobel operator of edge detection in GPU. Then a simple and effective method is designed to remove the fake edge and a heuristic algorithm is used to repair the broken edge. It is proved by the experiments that the results of our algorithm are natural and realistic in terms of morphology and can be good materials for the virtual plant.

Shadow Volume in Real-Time Rendering

This paper presents an optimization of shadow volume algorithm, which allow a rendering in real-time. This technique is based on previous works which makes it possible to obtain shadows in real-time, although the calculation of the silhouette requires a pretreatment of the geometry implemented on the CPU （Central Processing Unit）. By using last version of the GPU （Graphic Processing Unit）, the authors propose to implement the calculation of the silhouette on the GPU by using Geometry Shader. The authors present the step which made it possible to lead to a concrete implementation of this algorithm, the modifications which were made, as well as a comparative study of results, followed by a discussion of these results and choices of implementation.

A Low-Cost Efficient Hardware-in-the-Loop Testbed for Distributed Generation Penetration Analysis

In this paper a real-time testbed using hardware-in-the-loop for the analysis of the effects of DGs （distributed generators） on microgrids is presented. The distribution network is implemented in SIMULINK using the IEEE 15-node distribution feeder connected to two DGs feeding the grid using two smart inverters. The inverters＇ active and reactive power control is performed by TI C2000-based controllers and the hardware connections to the system are done through dSPACE interface module. The system is designed such that it can easily be modified to change the location of the DGs and/or to change the number of DGs connected to the grid. Several case study results are presented and compared against simulations to verify the effectiveness and accuracy of the system, model, and the employed power control schemes.

A Parallel Approach for Real-Time Power Flow in Distribution Networks

The new reality of smart distribution systems with use of generation sources of small and medium sizes brings new challenges for the operation of these systems. The complexity and the large number of nodes requires use of methods which can reduce the processing time of algorithms such as power flow, allowing its use in real time. This paper presents a known methodology for calculating the power flow in three phases using backward/forward sweep method, and also considering other network elements such as voltage regulators, shunt capacitors and sources of dispersed generation of types PV （active power and voltage） and PQ （active and reactive power）. After that, new elements are introduced that allow the parallelization of this algorithm and an adequate distribution of work between the available processors. The algorithm was implemented using a multi-tiered architecture; the processing times were measured in many network configurations and compared with the same algorithm in the serial version.

Iris:a multi-constraint graphic layout generation system

In graphic design,layout is a result of the interaction between the design elements in the foreground and background images.However,prevalent research focuses on enhancing the quality of layout generation algorithms,overlooking the interaction and controllability that are essential for designers when applying these methods in realworld situations.This paper proposes a user-centered layout design system,Iris,which provides designers with an interactive environment to expedite the workflow,and this environment encompasses the features of user-constraint specification,layout generation,custom editing,and final rendering.To satisfy the multiple constraints specified by designers,we introduce a novel generation model,multi-constraint LayoutVQ-VAE,for advancing layout generation under intra-and inter-domain constraints.Qualitative and quantitative experiments on our proposed model indicate that it outperforms or is comparable to prevalent state-of-the-art models in multiple aspects.User studies on Iris further demonstrate that the system significantly enhances design efficiency while achieving human-like layout designs.

Real-time color holographic video reconstruction using multiple-graphics processing unit cluster acceleration and three spatial light modulators

We demonstrate real-time three-dimensional(3D)color video using a color electroholographic system with a cluster of multiple-graphics processing units(multi-GPU)and three spatial light modulators(SLMs)corresponding respectively to red,green,and blue(RGB)-colored reconstructing lights.The multi-GPU cluster has a computer-generated hologram(CGH)display node containing a GPU,for displaying calculated CGHs on SLMs,and four CGH calculation nodes using 12 GPUs.The GPUs in the CGH calculation node generate CGHs corresponding to RGB reconstructing lights in a 3D color video using pipeline processing.Real-time color electroholography was realized for a 3D color object comprising approximately 21,000 points per color.

Real-time electroholography using a single spatial light modulator and a cluster of graphics-processing units connected by a gigabit Ethernet network

Systems containing multiple graphics-processing-unit(GPU)clusters are difficult to use for real-time electroholography when using only a single spatial light modulator because the transfer of the computer-generated hologram data between the GPUs is bottlenecked.To overcome this bottleneck,we propose a rapid GPU packing scheme that significantly reduces the volume of the required data transfer.The proposed method uses a multi-GPU cluster system connected with a cost-effective gigabit Ethernet network.In tests,we achieved real-time electroholography of a three-dimensional(3D)video presenting a point-cloud 3D object made up of approximately 200,000 points.

Real-time spatiotemporal division multiplexing electroholography for 1,200,000 object points using multiple-graphics processing unit cluster

Computationally, the calculation of computer-generated holograms is extremely expensive, and the image quality deteriorates when reconstructing three-dimensional(3 D) holographic video from a point-cloud model comprising a huge number of object points. To solve these problems, we implement herein a spatiotemporal division multiplexing method on a cluster system with 13 GPUs connected by a gigabit Ethernet network.A performance evaluation indicates that the proposed method can realize a real-time holographic video of a3 D object comprising ~1,200,000 object points. These results demonstrate a clear 3 D holographic video at32.7 frames per second reconstructed from a 3 D object comprising 1,064,462 object points.

Architecture of the Graphics System for Embedded Real-Time Operating Systems

This paper presents a new architecture of a graphics system for microkernel operating systems,including real-time operating systems.The following major parts of the architecture are presented:a user-level subsystem responsible for interaction with user applications;a bottom-level subsystem providing the functionality for graphics drivers,such as managing graphics output,video memory management,etc.;a kernel-level subsystem providing interaction with the kernel,and performing low-level operations,such as working with physical memory,processes,etc.The mechanisms of interaction of user applications with the user level of the graphics system,as well as interaction of the different levels of the graphics subsystem are presented.The paper pays much attention to various approaches to testing:the use of unit testing,testing using hardware and software emulators.Another important characteristic of a graphics system is its performance,in particular the performance of low-level operations such as memory allocation:the developed architecture suggests using a separate memory allocator which is faster than standard memory allocation functions.Comparison of the performances of graphics system implementation for microkernel real-time operating system and graphics server Xorg is presented,showing significant superiority of the proposed architecture in a number of work scenarios.

Procedural generation and real-time rendering of a marine ecosystem

Underwater scene is one of the most marvelous environments in the world. In this study, we present an efficient procedural modeling and rendering system to generate marine ecosystems for swim-through graphic applications. To produce realistic and natural underwater scenes, several techniques and algorithms have been presented and introduced. First, to distribute sealife naturally on a seabed, we employ an ecosystem simulation that considers the influence of the underwater environment. Second, we propose a two-level procedural modeling system to generate sealife with unique biological features. At the base level, a series of grammars are designed to roughly represent underwater sealife on a central processing unit(CPU). Then at the fine level, additional details of the sealife are created and rendered using graphic processing units(GPUs). Such a hybrid CPU-GPU framework best adopts sequential and parallel computation in modeling a marine ecosystem, and achieves a high level of performance.Third, the proposed system integrates dynamic simulations in the proposed procedural modeling process to support dynamic interactions between sealife and the underwater environment, where interactions and physical factors of the environment are formulated into parameters and control the geometric generation at the fine level. Results demonstrate that this system is capable of generating and rendering scenes with massive corals and sealife in real time.

Architecture of Graphics System with 3D Acceleration Support for Embedded Operating Systems

An increasing number of tasks now require the use of hardware accelerators to reduce the time required for computation and display the computational results.This paper presents a new graphics system architecture for operating systems(OSs)with microkernel architecture,including real-time OSs.The proposed system architecture provides capabilities for displaying graphical images on various information display devices and for accelerating graphical operations on GPU.The architecture of the graphics system uses a concept of allocators to manage system and video memory,provides an abstraction of memory operations with a single interface for video memory management,and simplifies memory handling where incorrect operation is the cause of many failures.A comparison between the performance of a real-time OS and Linux OS implementing the graphics system using the example of a glmark2 benchmark is presented,thereby the superiority of the proposed architecture in several scenarios is demonstrated.

Real-Time Texture Synthesis Using s-Tile Set

This paper presents a novel method of generating a set of texture tiles from samples, which can be seamlessly tiled into arbitrary size textures in real-time. Compared to existing methods, our approach is simpler and more advantageous in eliminating visual seams that may exist in each tile of the existing methods, especially when the samples have elaborate features or distinct colors. Texture tiles generated by our approach can be regarded as single-colored tiles on each orthogonal direction border, which are easier for tiling and more suitable for sentence tiling. Experimental results demonstrate the feasibility and effectiveness of our approach.

Template-based AADL automatic code generation

Embedded real-time systems employ a variety of operating system platforms. Consequently, for automatic code generation, considerable redevelopment is needed when the platform changes. This results in major challenges with respect to the automatic code generation process of the architecture analysis and design language (AADL). In this paper, we propose a method of template-based automatic code generation to address this issue. Templates are used as carriers of automatic code generation rules from AADL to the object platform. These templates can be easily modified for different platforms. Automatic code generation for different platforms can be accomplished by formulating the corresponding generation rules and transformation templates. We design a set of code generation templates from AADL to the object platform and develop an automatic code generation tool. Finally, we take a typical data processing unit (DPU) system as a case study to test the tool. It is demonstrated that the autogenerated codes can be compiled and executed successfully on the object platform.

A formal method to real-time protocol interoperability testing

Interoperability testing is an important technique to ensure the quality of implementations of network communication protocol. In the next generation Internet protocol, real-time applications should be supported effectively. However, time constraints were not considered in the related studies of protocol interoperability testing, so existing interoperability testing methods are difficult to be applied in real-time protocol interoperability testing. In this paper, a formal method to real-time protocol interoperability testing is proposed. Firstly, a formal model CMpTIOA （communicating multi-port timed input output automata） is defined to specify the system under test （SUT） in real-time protocol interoperability testing; based on this model, timed interoperability relation is then defined. In order to check this relation, a test generation method is presented to generate a parameterized test behavior tree from SUT model; a mechanism of executability pre-determination is also integrated in the test generation method to alleviate state space explosion problem to some extent. The proposed theory and method are then applied in interoperability testing of IPv6 neighbor discovery protocol to show the feasibility of this method.