Triggering scheme is a significant factor that may influence the process of vacuum arc initiation. In this work, the characteristics of resistance triggering of a pulsed vacuum arc ion source are investigated and comp...Triggering scheme is a significant factor that may influence the process of vacuum arc initiation. In this work, the characteristics of resistance triggering of a pulsed vacuum arc ion source are investigated and compared with the independent pulse generator triggering. The results show that although the resistance triggering method is capable of triggering a vacuum arc ion source by properly choosing the resistance and electric parameters, it inevitably increases the rise time of the arc current. A high speed multiframe camera is used to reveal the transition process o~ arc initiation during one shot. From the images it is conjectured that the lower voltage between the cathode and the anode may be the reason that leads to the lower transition speed of discharge at the moment of arc initiation.展开更多
The parasitic source resistance(RS) of AlGaN/AlN/GaN heterostructure field-effect transistors(HFETs) is studied in the temperature range 300–500 K. By using the measured RSand both capacitance–voltage(C–V) an...The parasitic source resistance(RS) of AlGaN/AlN/GaN heterostructure field-effect transistors(HFETs) is studied in the temperature range 300–500 K. By using the measured RSand both capacitance–voltage(C–V) and current–voltage(I–V) characteristics for the fabricated device at 300, 350, 400, 450, and 500 K, it is found that the polarization Coulomb field(PCF) scattering exhibits a significant impact on RSat the above-mentioned different temperatures. Furthermore, in the AlGaN/AlN/GaN HFETs, the interaction between the additional positive polarization charges underneath the gate contact and the additional negative polarization charges near the source Ohmic contact, which is related to the PCF scattering, is verified during the variable-temperature study of RS.展开更多
As technology node shrinks, aggressive design rules for contact and other back end of line(BEOL)layers continue to drive the need for more effective full chip patterning optimization. Resist top loss is one of the m...As technology node shrinks, aggressive design rules for contact and other back end of line(BEOL)layers continue to drive the need for more effective full chip patterning optimization. Resist top loss is one of the major challenges for 28 nm and below technology nodes, which can lead to post-etch hotspots that are difficult to predict and eventually degrade the process window significantly. To tackle this problem, we used an advanced programmable illuminator(FlexRay) and Tachyon SMO(Source Mask Optimization) platform to make resistaware source optimization possible, and it is proved to greatly improve the imaging contrast, enhance focus and exposure latitude, and minimize resist top loss thus improving the yield.展开更多
基金Supported by the National Natural Science Foundation of China under Grant Nos 11105130 and 11475156
文摘Triggering scheme is a significant factor that may influence the process of vacuum arc initiation. In this work, the characteristics of resistance triggering of a pulsed vacuum arc ion source are investigated and compared with the independent pulse generator triggering. The results show that although the resistance triggering method is capable of triggering a vacuum arc ion source by properly choosing the resistance and electric parameters, it inevitably increases the rise time of the arc current. A high speed multiframe camera is used to reveal the transition process o~ arc initiation during one shot. From the images it is conjectured that the lower voltage between the cathode and the anode may be the reason that leads to the lower transition speed of discharge at the moment of arc initiation.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.11174182,11574182,and 61306113)the Specialized Research Fund for the Doctoral Program of Higher Education of China(Grant No.20110131110005)
文摘The parasitic source resistance(RS) of AlGaN/AlN/GaN heterostructure field-effect transistors(HFETs) is studied in the temperature range 300–500 K. By using the measured RSand both capacitance–voltage(C–V) and current–voltage(I–V) characteristics for the fabricated device at 300, 350, 400, 450, and 500 K, it is found that the polarization Coulomb field(PCF) scattering exhibits a significant impact on RSat the above-mentioned different temperatures. Furthermore, in the AlGaN/AlN/GaN HFETs, the interaction between the additional positive polarization charges underneath the gate contact and the additional negative polarization charges near the source Ohmic contact, which is related to the PCF scattering, is verified during the variable-temperature study of RS.
文摘As technology node shrinks, aggressive design rules for contact and other back end of line(BEOL)layers continue to drive the need for more effective full chip patterning optimization. Resist top loss is one of the major challenges for 28 nm and below technology nodes, which can lead to post-etch hotspots that are difficult to predict and eventually degrade the process window significantly. To tackle this problem, we used an advanced programmable illuminator(FlexRay) and Tachyon SMO(Source Mask Optimization) platform to make resistaware source optimization possible, and it is proved to greatly improve the imaging contrast, enhance focus and exposure latitude, and minimize resist top loss thus improving the yield.