In this paper, the problem how to reduce the GB effect in SC filters is discussed. A new generalbiquadratic SC structure in which the GB effect is reduced is developed. The structure is stray-insensitiveand has very l...In this paper, the problem how to reduce the GB effect in SC filters is discussed. A new generalbiquadratic SC structure in which the GB effect is reduced is developed. The structure is stray-insensitiveand has very low W<sub>0</sub> and Q sensitivities. Using the low-pass SC filter for an example, method of reducingthe GB effect has been shown in detail.展开更多
This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switch...This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.展开更多
In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been ...In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.展开更多
文摘In this paper, the problem how to reduce the GB effect in SC filters is discussed. A new generalbiquadratic SC structure in which the GB effect is reduced is developed. The structure is stray-insensitiveand has very low W<sub>0</sub> and Q sensitivities. Using the low-pass SC filter for an example, method of reducingthe GB effect has been shown in detail.
文摘This paper describes a very low level dc current amplifier using switched capacitor (SC) circuit to miniaturize and improve its output response speed, instead of the conventionally used high-oh-mage resistor. A switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier. The simulation results show that the parasitic capacitances that are distributed to the input portion of the amplifier have some effect on offset voltage. From the experimental results, it is seen that the duty ratio of the clock cycle of SC circuit should be in the range from 0.05 to 0.70. It is suggested that the proposed very low level dc current amplifier using SC circuit is an effective way to obtain both a faster output response and its miniaturization.
基金Supported by the National Nature Science Foundation(No. 60072004)and the University Postgraduate Station Foundation of China(No.2000061402)
文摘In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.
