A Novel Framework to Construct S-Box Quantum Circuits Using System Modeling: Application to 4-Bit S-Boxes

Quantum computers accelerate many algorithms based on the superposition principle of quantum mechanics.The Grover algorithm provides significant performance to malicious users attacking symmetric key systems.Since the performance of attacks using quantum computers depends on the efficiency of the quantum circuit of the encryption algorithms,research research on the implementation of quantum circuits is essential.This paper presents a new framework to construct quantum circuits of substitution boxes(S-boxes)using system modeling.We model the quantum circuits of S-boxes using two layers:Toffoli and linear layers.We generate vector spaces based on the values of qubits used in the linear layers and apply them to find quantum circuits.The framework finds the circuit bymatching elements of vector spaces generated fromthe input and output of a given S-box,using the forward search or themeet-in-the-middle strategy.We developed a tool to apply this framework to 4-bit S-boxes.While the 4-bit S-box quantum circuit construction tool LIGHTER-R only finds circuits that can be implemented with four qubits,the proposed tool achieves the circuits with five qubits.The proposed tool can find quantum circuits of 4-bit odd permutations based on the controlled NOT,NOT,and Toffoli gates,whereas LIGHTER-R is unable to perform this task in the same environment.We expect this technique to become a critical step toward optimizing S-box quantum circuits.

MET receptor tyrosine kinase promotes the generation of functional synapses in adult cortical circuits

Loss of synapse and functional connectivity in brain circuits is associated with aging and neurodegeneration,however,few molecular mechanisms are known to intrinsically promote synaptogenesis or enhance synapse function.We have previously shown that MET receptor tyrosine kinase in the developing cortical circuits promotes dendritic growth and dendritic spine morphogenesis.To investigate whether enhancing MET in adult cortex has synapse regenerating potential,we created a knockin mouse line,in which the human MET gene expression and signaling can be turned on in adult(10–12 months)cortical neurons through doxycycline-containing chow.We found that similar to the developing brain,turning on MET signaling in the adult cortex activates small GTPases and increases spine density in prefrontal projection neurons.These findings are further corroborated by increased synaptic activity and transient generation of immature silent synapses.Prolonged MET signaling resulted in an increasedα-amino-3-hydroxy-5-methyl-4-isoxazolepropionic acid/N-methyl-Daspartate(AMPA/NMDA)receptor current ratio,indicative of enhanced synaptic function and connectivity.Our data reveal that enhancing MET signaling could be an interventional approach to promote synaptogenesis and preserve functional connectivity in the adult brain.These findings may have implications for regenerative therapy in aging and neurodegeneration conditions.

Nullors, and Nullor Circuits;There Applications in Symbolic Circuit Analysis and Design

The objective in this presentation is to introduce some of the unique properties and applications of nullors in active circuit analysis and designs. The emphasis is to discuss the role nullors can play in symbolic representation of transfer functions. To show this we adopt the topological platform for the circuit analysis and use a recently developed Admittance Method (AM) to achieve the Sum of Tree Products (STP), replacing the determinant and cofactors of the Nodal Admittance Matrix (NAM) of the circuit. To construct a transfer function, we start with a given active circuit and convert all its controlled sources and I/O-ports to nullors. Now, with a solid nullor circuit (passive elements and nullors) we first eliminate the passive elements through AM operations. This produces the STPs. Second, the all-nullor circuit is then used to find the signs or the STPs. Finally, the transfer function (in symbolic, if chosen) is obtained from the ratio between the STPs.

In-situ deposited anti-aging TiN capping layer for Nb superconducting quantum circuits

The performance of Nb superconducting quantum devices is predominantly limited by dielectric loss at the metal–air interface,where Nb2O5 is considered the main loss source.Here,we suppress the formation of native oxides by in-situ deposition of a TiN capping layer on the Nb film.With TiN capping layers,no Nb2O5 forms on the surface of the Nb film.The quality factor Qi of the Nb resonator increases from 5.6×10^(5) to 7.9×10^(5) at low input power and from 6.8×10^(6) to 1.1×10^(7)at high input power.Furthermore,the TiN capping layer also shows good aging resistance in Nb resonator devices,with no significant performance fluctuations after one month of aging.These findings highlight the effectiveness of TiN capping layers in enhancing the performance and longevity of Nb superconducting quantum devices.

Correction of microwave pulse reflection by digital filters in superconducting quantum circuits

Reducing the control error is vital for high-fidelity digital and analog quantum operations.In superconducting circuits,one disagreeable error arises from the reflection of microwave signals due to impedance mismatch in the control chain.Here,we demonstrate a reflection cancelation method when considering that there are two reflection nodes on the control line.We propose to generate the pre-distortion pulse by passing the envelopes of the microwave signal through digital filters,which enables real-time reflection correction when integrated into the field-programmable gate array(FPGA).We achieve a reduction of single-qubit gate infidelity from 0.67%to 0.11%after eliminating microwave reflection.Real-time correction of microwave reflection paves the way for precise control and manipulation of the qubit state and would ultimately enhance the performance of algorithms and simulations executed on quantum processors.

Interplay between topology and localization on superconducting circuits

Topological insulators occupy a prominent position in the realm of condensed matter physics. Nevertheless, the presence of strong disorder has the potential to disrupt the integrity of topological states, leading to the localization of all states.This study delves into the intricate interplay between topology and localization within the one-dimensional Su–Schrieffer–Heeger(SSH) model, which incorporates controllable off-diagonal quasi-periodic modulations on superconducting circuits.Through the application of external alternating current(ac) magnetic fluxes, each transmon undergoes controlled driving,enabling independent tuning of all coupling strengths. Within a framework of this model, we construct comprehensive phase diagrams delineating regions characterized by extended topologically nontrivial states, critical localization, and coexisting topological and critical localization phases. The paper also addresses the dynamics of qubit excitations, elucidating distinct quantum state transfers resulting from the intricate interplay between topology and localization. Additionally, we propose a method for detecting diverse quantum phases utilizing existing experimental setups.

Neuromorphic circuits based on memristors: endowing robots with a human-like brain

Robots are widely used,providing significant convenience in daily life and production.With the rapid development of artificial intelligence and neuromorphic computing in recent years,the realization of more intelligent robots through a pro-found intersection of neuroscience and robotics has received much attention.Neuromorphic circuits based on memristors used to construct hardware neural networks have proved to be a promising solution of shattering traditional control limita-tions in the field of robot control,showcasing characteristics that enhance robot intelligence,speed,and energy efficiency.Start-ing with introducing the working mechanism of memristors and peripheral circuit design,this review gives a comprehensive analysis on the biomimetic information processing and biomimetic driving operations achieved through the utilization of neuro-morphic circuits in brain-like control.Four hardware neural network approaches,including digital-analog hybrid circuit design,novel device structure design,multi-regulation mechanism,and crossbar array,are summarized,which can well simulate the motor decision-making mechanism,multi-information integration and parallel control of brain at the hardware level.It will be definitely conductive to promote the application of memristor-based neuromorphic circuits in areas such as intelligent robotics,artificial intelligence,and neural computing.Finally,a conclusion and future prospects are discussed.

Pixelated non-volatile programmable photonic integrated circuits with 20-level intermediate states

Multi-level programmable photonic integrated circuits(PICs)and optical metasurfaces have gained widespread attention in many fields,such as neuromorphic photonics,opticalcommunications,and quantum information.In this paper,we propose pixelated programmable Si_(3)N_(4)PICs with record-high 20-level intermediate states at 785 nm wavelength.Such flexibility in phase or amplitude modulation is achieved by a programmable Sb_(2)S_(3)matrix,the footprint of whose elements can be as small as 1.2μm,limited only by the optical diffraction limit of anin-house developed pulsed laser writing system.We believe our work lays the foundation for laser-writing ultra-high-level(20 levels and even more)programmable photonic systems and metasurfaces based on phase change materials,which could catalyze diverse applications such as programmable neuromorphic photonics,biosensing,optical computing,photonic quantum computing,and reconfigurable metasurfaces.

2024 IEEE International Conference on Integrated Circuits,Technologies and Applications

October 25-27(Fri-Sun),2024 Hangzhou杭州,Hangzhou,China Call for Papers The 7th IEEE International Conference on Integrated Circuits,Technologies and Applications(ICTA 2024),will be held on October 25-27,2024 in Hangzhou,China.This conference will be held in China to provide an international forum according to IEEE standard for the presentation and exchange of the latest technical achievements and cross-discipline fertilization of IC designs,technologies,and applications in our fast-changing society.This year's theme is“Chiplet and Future IDM”.

Design of Cold-Junction Compensation and Disconnection Detection Circuits of Various Thermocouples and Implementation of Multi-Channel Interfaces Using Them-A Secondary Publication

Cold-junction compensation(CJC)and disconnection detection circuit design of various thermocouples(TC)and multi-channel TC interface circuits were designed.The CJC and disconnection detection circuit consists of a CJC semiconductor device,an instrumentation amplifier(IA),two resistors,and a diode for disconnection detection.Based on the basic circuit,a multi-channel interface circuit was also implemented.The CJC was implemented using compensation semiconductor and IA,and disconnection detection was detected by using two resistors and a diode so that IA input voltage became-0.42 V.As a result of the experiment using R-type TC,the error of the designed circuit was reduced from 0.14 mV to 3μV after CJC in the temperature range of 0°C to 1400°C.In addition,it was confirmed that the output voltage of IA was saturated from 88 mV to-14.2 V when TC was disconnected from normal.The output voltage of the designed circuit was 0 V to 10 V in the temperature range of 0°C to 1400°C.The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel.The implemented multi-channel interface has a feature that can be applied equally to E,J,K,T,R,and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

Emerging MoS_(2)Wafer-Scale Technique for Integrated Circuits

As an outstanding representative of layered materials,molybdenum disulfide(MoS_(2))has excellent physical properties,such as high carrier mobility,stability,and abundance on earth.Moreover,its reasonable band gap and microelectronic compatible fabrication characteristics makes it the most promising candidate in future advanced integrated circuits such as logical electronics,flexible electronics,and focal-plane photodetector.However,to realize the all-aspects application of MoS_(2),the research on obtaining high-quality and large-area films need to be continuously explored to promote its industrialization.Although the MoS_(2)grain size has already improved from several micrometers to sub-millimeters,the high-quality growth of wafer-scale MoS_(2)is still of great challenge.Herein,this review mainly focuses on the evolution of MoS_(2)by including chemical vapor deposition,metal–organic chemical vapor deposition,physical vapor deposition,and thermal conversion technology methods.The state-of-the-art research on the growth and optimization mechanism,including nucleation,orientation,grain,and defect engineering,is systematically summarized.Then,this review summarizes the wafer-scale application of MoS_(2)in a transistor,inverter,electronics,and photodetectors.Finally,the current challenges and future perspectives are outlined for the wafer-scale growth and application of MoS_(2).

Power Prediction of VLSI Circuits Using Machine Learning

The difference between circuit design stage and time requirements has broadened with the increasing complexity of the circuit.A big database is needed to undertake important analytical work like statistical method,heat research,and IR-drop research that results in extended running times.This unit focuses on the assessment of test strength.Because of the enormous number of successful designs for currentmodels and the unnecessary time required for every test,maximum energy ratings with all tests cannot be achieved.Nevertheless,test safety is important for producing trustworthy findings to avoid loss of output and harm to the chip.Generally,effective power assessment is only possible in a limited sample of pre-selected experiments.Thus,a key objective is to find the experiments that might give the worst situations again for testing power.It offers a machine-based circuit power estimation(MLCPE)system for the selection of exams.Two distinct techniques of predicting are utilized.Firstly,to find testings with power dissipation,it forecasts the behavior of testing.Secondly,the changemovement and energy data are linked to the semiconductor design,identifying small problem areas.Several types of algorithms are utilized.In particular,the methods compared.The findings show great accuracy and efficiency in forecasting.That enables such methods suitable for selecting the worst scenario.

Fault Diagnosis of Power Electronic Circuits Based on Adaptive Simulated Annealing Particle Swarm Optimization

In the field of energy conversion,the increasing attention on power electronic equipment is fault detection and diagnosis.A power electronic circuit is an essential part of a power electronic system.The state of its internal components affects the performance of the system.The stability and reliability of an energy system can be improved by studying the fault diagnosis of power electronic circuits.Therefore,an algorithm based on adaptive simulated annealing particle swarm optimization(ASAPSO)was used in the present study to optimize a backpropagation(BP)neural network employed for the online fault diagnosis of a power electronic circuit.We built a circuit simulation model in MATLAB to obtain its DC output voltage.Using Fourier analysis,we extracted fault features.These were normalized as training samples and input to an unoptimized BP neural network and BP neural networks optimized by particle swarm optimization(PSO)and the ASAPSO algorithm.The accuracy of fault diagnosis was compared for the three networks.The simulation results demonstrate that a BP neural network optimized with the ASAPSO algorithm has higher fault diagnosis accuracy,better reliability,and adaptability and can more effectively diagnose and locate faults in power electronic circuits.

A new method of constructing adversarial examplesfor quantum variational circuits

A quantum variational circuit is a quantum machine learning model similar to a neural network.A crafted adversarial example can lead to incorrect results for the model.Using adversarial examples to train the model will greatly improve its robustness.The existing method is to use automatic differentials or finite difference to obtain a gradient and use it to construct adversarial examples.This paper proposes an innovative method for constructing adversarial examples of quantum variational circuits.In this method,the gradient can be obtained by measuring the expected value of a quantum bit respectively in a series quantum circuit.This method can be used to construct the adversarial examples for a quantum variational circuit classifier.The implementation results prove the effectiveness of the proposed method.Compared with the existing method,our method requires fewer resources and is more efficient.

Observation of size-dependent boundary effects in non-Hermitian electric circuits

The non-Hermitian systems with the non-Hermitian skin effect(NHSE)are very sensitive to the imposed boundary conditions and lattice sizes,which lead to size-dependent non-Hermitian skin effects.Here,we report the experimental observation of NHSE with different boundary conditions and different lattice sizes in the unidirectional hopping model based on a circuit platform.The circuit admittance spectra and corresponding eigenstates are very sensitive to the presence of the boundary.Meanwhile,our experimental results show how the lattice sizes and boundary terms together affect the strength of NHSE.Therefore,our electric circuit provides a good platform to observe size-dependent boundary effects in non-Hermitian systems.

Diffusive field coupling-induced synchronization between neural circuits under energy balance

When charged bodies come up close to each other,the field energy is diffused and their states are regulated under bidirectional field coupling.For biological neurons,the diversity in intrinsic electric and magnetic field energy can create synaptic connection for fast energy balance and synaptic current is passed across the synapse channel;as a result,energy is pumped and exchanged to induce synchronous firing modes.In this paper,a capacitor is used to connect two neural circuits and energy propagation is activated along the coupling channel.The intrinsic field energy in the two neural circuits is exchanged and the coupling intensity is controlled adaptively using the Heaviside function.Some field energy is saved in the coupling channel and is then sent back to the coupled neural circuits to reach energy balance.Therefore the circuits can reach possible energy balance and complete synchronization.It is possible that the diffusive energy of the coupled neurons inspires the synaptic connections to grow stronger for possible energy balance.

Method of simulating hybrid STT-MTJ/CMOS circuits based on MATLAB/Simulink

The spin-transfer-torque(STT)magnetic tunneling junction(MTJ)device is one of the prominent candidates for spintronic logic circuit and neuromorphic computing.Therefore,building a simulation framework of hybrid STT-MTJ/CMOS(complementary metal-oxide-semiconductor)circuits is of great value for designing a new kind of computing paradigm based on the spintronic devices.In this work,we develop a simulation framework of hybrid STT-MTJ/CMOS circuits based on MATLAB/Simulink,which is mainly composed of a physics-based STT-MTJ model,a controlled resistor,and a current sensor.In the proposed framework,the STT-MTJ model,based on the Landau-Lifshitz-Gilbert-Slonczewsk(LLGS)equation,is implemented using the MATLAB script.The proposed simulation framework is modularized design,with the advantage of simple-to-use and easy-to-expand.To prove the effectiveness of the proposed framework,the STT-MTJ model is benchmarked with experimental results.Furthermore,the pre-charge sense amplifier(PCSA)circuit consisting of two STT-MTJ devices is validated and the electrical coupling of two spin-torque oscillators is simulated.The results demonstrate the effectiveness of our simulation framework.

Analyzing Electric Circuits with Computer Algebra

This report shows how starting from classic electric circuits embodying commonly electric components we have reached semi-complicated circuits embodying the same components that analyzing the signal characteristics requires a Computer Algebra System. Our approach distinguishes itself from the electrical engineers’ (EE) approach that relies on utilizing commercially available software. Our approach step-by-step shows how Kirchhoff’s rules are applied conducive to the needed circuit information. It is shown for the case at hand the characteristic information is a set of coupled differential equations and that with the help of Mathematica numeric solutions are sought. Our report paves the research road for unlimited creative similar circuits with any degree of complications. Occasionally, by tweaking the circuits we have addressed the “what if” scenarios widening the scope of the investigation. Justification of the accuracy of our analysis for the generalized circuits is cross-checked by arranging the components symmetrizing the circuit leading to an intuitively predictable reasonable result. Mathematica codes are embedded assisting the interested reader in producing and extending our results.

Three Dimensional Electric Circuits with Multiple Capacitors and Resistors

Two cubical 3D electric circuits with single and double capacitors and twelve ohmic resistors are considered. The resistors are the sides of the cube. The circuit is fed with a single internal emf. The charge on the capacitor(s) and the current distributions of all twelve sides of the circuit(s) vs. time are evaluated. The analysis requires solving twelve differential-algebraic intertwined symbolic equations. This is accomplished by applying a Computer Algebra System (CAS), specifically Mathematica. The needed codes are included. For a set of values assigned to the elements, the numeric results are depicted.

2023 IEEE International Conference on Integrated Circuits,Technologies and Applications Call for Papers

The 6^(th)IEEE International Conference on Integrated Circuits,Technologies and Applications(ICTA 2023),will be held on October,2023 in Hefei,China.This conference will be held in China to provide an international forum according to IEEE standard for the presentation and exchange of the latest technical achievements and cross-discipline fertilization of IC designs,technologies,and applications in our fast-changing society.