首先对羰基铁进行点腐蚀得到多孔羰基铁,然后采用St?ber法和原位聚合法将SiO_2和导电高分子聚吡咯包覆在多孔羰基铁表面,制备多孔羰基铁/SiO_2/聚吡咯电磁复合吸波材料。采用XRD、SEM、TEM、FT-IR对样品结构、微观形貌进行了表征,在网...首先对羰基铁进行点腐蚀得到多孔羰基铁,然后采用St?ber法和原位聚合法将SiO_2和导电高分子聚吡咯包覆在多孔羰基铁表面,制备多孔羰基铁/SiO_2/聚吡咯电磁复合吸波材料。采用XRD、SEM、TEM、FT-IR对样品结构、微观形貌进行了表征,在网络分析仪中采用同轴法测试样品电磁参数,并根据传输线理论研究了2~18 GHz微波频段内吡咯含量及涂层厚度对样品吸波性能的影响。实验结果表明:制备的多孔羰基铁/SiO_2/聚吡咯复合电磁吸波材料具有核壳结构;随着吡咯加入量的增加,吸波材料吸收峰逐渐向低频方向移动;当涂层厚度为3.5 mm、吡咯加入量为6%(w/w)时,在9.44~17.56 GHz范围内反射率均低于-10 d B,频带宽度为8.12 GHz,损耗反射率达到-23 d B。良好的吸波性能归因于复合物有效的阻抗匹配特性及多重界面极化效应,多孔羰基铁/SiO_2/聚吡咯是一种轻质、宽频、强吸收的吸波材料。展开更多
We present a new charge trapping memory(CTM) device with the Au/Ga2O3/SiO2/Si structure, which is fabricated by using the magnetron sputtering, high-temperature annealing, and vacuum evaporation techniques. Transmissi...We present a new charge trapping memory(CTM) device with the Au/Ga2O3/SiO2/Si structure, which is fabricated by using the magnetron sputtering, high-temperature annealing, and vacuum evaporation techniques. Transmission electron microscopy diagrams show that the thickness of the SiO2 tunneling layer can be controlled by the annealing temperature.When the devices are annealed at 760℃, the measured C-V hysteresis curves exhibit a maximum 6 V memory window under a ±13 V sweeping voltage. In addition, a slight degradation of the device voltage and capacitance indicates the robust retention properties of flat-band voltage and high/low state capacitance. These distinctive advantages are attributed to oxygen vacancies and inter-diffusion layers, which play a critical role in the charge trapping process.展开更多
文摘首先对羰基铁进行点腐蚀得到多孔羰基铁,然后采用St?ber法和原位聚合法将SiO_2和导电高分子聚吡咯包覆在多孔羰基铁表面,制备多孔羰基铁/SiO_2/聚吡咯电磁复合吸波材料。采用XRD、SEM、TEM、FT-IR对样品结构、微观形貌进行了表征,在网络分析仪中采用同轴法测试样品电磁参数,并根据传输线理论研究了2~18 GHz微波频段内吡咯含量及涂层厚度对样品吸波性能的影响。实验结果表明:制备的多孔羰基铁/SiO_2/聚吡咯复合电磁吸波材料具有核壳结构;随着吡咯加入量的增加,吸波材料吸收峰逐渐向低频方向移动;当涂层厚度为3.5 mm、吡咯加入量为6%(w/w)时,在9.44~17.56 GHz范围内反射率均低于-10 d B,频带宽度为8.12 GHz,损耗反射率达到-23 d B。良好的吸波性能归因于复合物有效的阻抗匹配特性及多重界面极化效应,多孔羰基铁/SiO_2/聚吡咯是一种轻质、宽频、强吸收的吸波材料。
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61674050 and 61874158)the Top-notch Youth Project in Hebei Province,China(Grant No.BJ2014008)+9 种基金the Outstanding Youth Project of Hebei Province,China(Grant No.F2016201220)the Outstanding Youth Cultivation Project of Hebei University,China(Grant No.2015JQY01)the Project of Science and Technology Activities for Overseas Researcher,China(Grant No.CL201602)the Institute of Baoding Nanyang Research-New Material Technology Platform,China(Grant No.17H03)the Project of Distinguished Young of Hebei Province,China(Grant No.A2018201231)the Training Program of Innovation and Entrepreneurship for Undergraduates,China(Grant Nos.201710075013and 2017075)the Support Program for the Top Young Talents of Hebei Province,China(Grant No.70280011807)Training and Introduction of Highlevel Innovative Talents of Hebei University,China(Grant No.801260201300)Hundred Persons Plan of Hebei Province,China(Grant Nos.606999919001,606999919013,606999919014,and 801260201300)Innovation Funding Project of Hebei Province,China(Grant No.CXZZBS2019030)
文摘We present a new charge trapping memory(CTM) device with the Au/Ga2O3/SiO2/Si structure, which is fabricated by using the magnetron sputtering, high-temperature annealing, and vacuum evaporation techniques. Transmission electron microscopy diagrams show that the thickness of the SiO2 tunneling layer can be controlled by the annealing temperature.When the devices are annealed at 760℃, the measured C-V hysteresis curves exhibit a maximum 6 V memory window under a ±13 V sweeping voltage. In addition, a slight degradation of the device voltage and capacitance indicates the robust retention properties of flat-band voltage and high/low state capacitance. These distinctive advantages are attributed to oxygen vacancies and inter-diffusion layers, which play a critical role in the charge trapping process.
